[PATCH] drm/amdgpu:fix exclusive mode game texture blank(v2)

[Liu, Monk]

Already pushed to staging because Pro team are kinda hurry for this fix

The alloc size isn't need changed, cuz it always count vm_flush() in event no vm_flush needed

BR Monk

-----Original Message-----
From: Deucher, Alexander 
Sent: Friday, September 30, 2016 9:23 PM
To: Liu, Monk <Monk.Liu at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu at amd.com>
Subject: RE: [PATCH] drm/amdgpu:fix exclusive mode game texture blank(v2)

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf 
> Of Monk Liu
> Sent: Friday, September 30, 2016 1:00 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Liu, Monk
> Subject: [PATCH] drm/amdgpu:fix exclusive mode game texture blank(v2)
> 
> this fix DOTA and other exclusive & full screen game textrue blank 
> bug, the root cause is that when no ctx switch between two DMAframe, 
> CE go too faster and step to the next DMAframe, thus DE and CE are not 
> working on the same DAMframe.
> 
> Change-Id: I92714a1d434bb05e94220a2db9b4a6113b0c2efc
> Signed-off-by: Monk Liu <Monk.Liu at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 38261a0..4863426 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -129,6 +129,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, 
> unsigned num_ibs,
> 
>  	unsigned i;
>  	int r = 0;
> +	unsigned extra_nop = 0;
> 
>  	if (num_ibs == 0)
>  		return -EINVAL;
> @@ -155,6 +156,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, 
> unsigned num_ibs,
>  	alloc_size = amdgpu_ring_get_dma_frame_size(ring) +
>  		num_ibs * amdgpu_ring_get_emit_ib_size(ring);
> 
> +	if (job && !job->vm_needs_flush && ring->type ==
> AMDGPU_RING_TYPE_GFX) {
> +		extra_nop = 128;
> +	}

Don't you need to increase the alloc_size?  Also, can we add this to the asic specific gfx code?

> +
>  	r = amdgpu_ring_alloc(ring, alloc_size);
>  	if (r) {
>  		dev_err(adev->dev, "scheduling IB failed (%d).\n", r); @@ -165,6 
> +170,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
> num_ibs,
>  		patch_offset = amdgpu_ring_init_cond_exec(ring);
> 
>  	if (vm) {
> +		amdgpu_ring_insert_nop(ring, extra_nop); /* prevent CE go
> too fast than DE */
> +
>  		r = amdgpu_vm_flush(ring, job);
>  		if (r) {
>  			amdgpu_ring_undo(ring);
> --
> 1.9.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx