[PATCH 12/20] drm/amdgpu:impl mm_r/weg_nokiq

[Yu, Xiangliang]

> > +uint32_t amdgpu_mm_rreg_nokiq(struct amdgpu_device *adev, uint32_t
> > reg,
> > +			bool always_indirect)
> > +{
> > +	uint32_t ret;
> > +
> > +	if ((reg * 4) < adev->rmmio_size && !always_indirect)
> > +		ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
> > +	else {
> > +		unsigned long flags;
> > +
> > +		spin_lock_irqsave(&adev->mmio_idx_lock, flags);
> > +		writel((reg * 4), ((void __iomem *)adev->rmmio) +
> > (mmMM_INDEX * 4));
> > +		ret = readl(((void __iomem *)adev->rmmio) +
> > (mmMM_DATA * 4));
> > +		spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
> > +	}
> > +	trace_amdgpu_mm_rreg(adev->pdev->device, reg, ret);
> > +	return ret;
> > +}
> > +
> > +void amdgpu_mm_wreg_nokiq(struct amdgpu_device *adev, uint32_t
> reg,
> > uint32_t v,
> > +		    bool always_indirect)
> > +{
> > +	trace_amdgpu_mm_wreg(adev->pdev->device, reg, v);
> > +
> > +	if ((reg * 4) < adev->rmmio_size && !always_indirect)
> > +		writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
> > +	else {
> > +		unsigned long flags;
> > +
> > +		spin_lock_irqsave(&adev->mmio_idx_lock, flags);
> > +		writel((reg * 4), ((void __iomem *)adev->rmmio) +
> > (mmMM_INDEX * 4));
> > +		writel(v, ((void __iomem *)adev->rmmio) + (mmMM_DATA
> > * 4));
> > +		spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
> > +	}
> > +}
> 
> These are duplicated with the regular mm_rreg and mm_wreg functions.
> Maybe add a new parameter to the existing functions to bypass kiq in the sr-
> iov case?

Why not re-use always_indirect flag to check kiq path, I think kiq read register is also indirect way to get register value.

> 
> > +
> >  u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg)  {
> >  	if ((reg * 4) < adev->rio_mem_size)
> > --
> > 2.7.4
> >
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