[PATCH 3/3] drm/amdgpu/gfx9: Raven has two MECs

[axie]

Reviewed-by: Alex Xie <AlexBin.Xie at amd.com>


On 2017-06-07 11:10 AM, Alex Deucher wrote:
> This was missed when Andres' queue patches were rebased.
>
> Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 3ea0e71..e0193e4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -872,6 +872,7 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
>   
>   	switch (adev->asic_type) {
>   	case CHIP_VEGA10:
> +	case CHIP_RAVEN:
>   		adev->gfx.mec.num_mec = 2;
>   		break;
>   	default:

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