[PATCH v2] drm/amdgpu: fix solid screen and hard hang when 2k + 4k display connected with DP

[Christian König]

Am 26.06.2017 um 14:18 schrieb Huang Rui:
> Signed-off-by: Huang Rui <ray.huang at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>.

> ---
>
> V1 -> V2:
> - Add READ_ONCE to avoid complier might cause to read as previous fence value.
>
> I will refine fence checking with fence interface at amdgpu_fence.c after S3
> stress issue completed as Christian's suggestion.
>
> Thanks,
> Ray
>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 5bed483..af3c87b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -130,7 +130,7 @@ psp_cmd_submit_buf(struct psp_context *psp,
>   	ret = psp_cmd_submit(psp, ucode, cmd_buf_mc_addr,
>   			     fence_mc_addr, index);
>   
> -	while (*((unsigned int *)psp->fence_buf) != index) {
> +	while (READ_ONCE(*((unsigned int *)psp->fence_buf)) < index) {
>   		msleep(1);
>   	}
>