[PATCH] drm/amd/powerplay: disable engine spread spectrum feature on Vega10.

[Wang, Ken]

Reviewed-by: Ken Wang <Qingqing.Wang at amd.com>

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu at amd.com>
Sent: Thursday, May 4, 2017 11:33:24 AM
To: amd-gfx at lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/powerplay: disable engine spread spectrum feature on Vega10.

Vega10 atomfirmware do not have ASIC_InternalSS_Info table
so disable this feature by default in driver.

Change-Id: I2ef2c668fb41fc6c6f448c7c0f1812baf8e7b375
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 8baa890..e24e54c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -1535,7 +1535,11 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr,
         current_gfxclk_level->FbMult =
                         cpu_to_le32(dividers.ulPll_fb_mult);
         /* Spread FB Multiplier bit: bit 0:8 int, bit 31:16 frac */
-       current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;
+       if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+                               PHM_PlatformCaps_EngineSpreadSpectrumSupport))
+               current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;
+       else
+               current_gfxclk_level->SsOn = 0;
         current_gfxclk_level->SsFbMult =
                         cpu_to_le32(dividers.ulPll_ss_fbsmult);
         current_gfxclk_level->SsSlewFrac =
--
1.9.1

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