[PATCH 4/5] Revert "drm/radeon: reduce number of free VMIDs and pipes in KV"
Michel Dänzer
michel at daenzer.net
Wed Nov 29 17:24:52 UTC 2017
From: Michel Dänzer <michel.daenzer at amd.com>
This reverts the remaining changes of commit
62a7b7fbd08ef745bb51e8728e89125a0ba6327e, because radeon doesn't support
amdkfd anymore. The number of VMIDs was already changed back when amdkfd
support was removed.
Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
drivers/gpu/drm/radeon/cik.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 160d697fceeb..d3045a371a55 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4418,11 +4418,12 @@ static int cik_mec_init(struct radeon_device *rdev)
/*
* KV: 2 MEC, 4 Pipes/MEC, 8 Queues/Pipe - 64 Queues total
* CI/KB: 1 MEC, 4 Pipes/MEC, 8 Queues/Pipe - 32 Queues total
- * Nonetheless, we assign only 1 pipe because all other pipes will
- * be handled by KFD
*/
- rdev->mec.num_mec = 1;
- rdev->mec.num_pipe = 1;
+ if (rdev->family == CHIP_KAVERI)
+ rdev->mec.num_mec = 2;
+ else
+ rdev->mec.num_mec = 1;
+ rdev->mec.num_pipe = 4;
rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8;
if (rdev->mec.hpd_eop_obj == NULL) {
@@ -4565,8 +4566,11 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
/* init the pipes */
mutex_lock(&rdev->srbm_mutex);
- for (i = 0; i < rdev->mec.num_pipe; ++i) {
- cik_srbm_select(rdev, 0, i, 0, 0);
+ for (i = 0; i < (rdev->mec.num_pipe * rdev->mec.num_mec); ++i) {
+ int me = (i < 4) ? 1 : 2;
+ int pipe = (i < 4) ? i : (i - 4);
+
+ cik_srbm_select(rdev, me, pipe, 0, 0);
eop_gpu_addr = rdev->mec.hpd_eop_gpu_addr + (i * MEC_HPD_SIZE * 2) ;
/* write the EOP addr */
@@ -4583,6 +4587,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
WREG32(CP_HPD_EOP_CONTROL, tmp);
}
+ cik_srbm_select(rdev, 0, 0, 0, 0);
mutex_unlock(&rdev->srbm_mutex);
/* init the queues. Just two for now. */
--
2.15.0
More information about the amd-gfx
mailing list