[PATCH umr] add SQ_WAVE_TTMP registers for gfx8 devices

[Tom St Denis]

Both the vi and ai read only 32 words (in umr).  I'll fix those to 64 
words before committing these.

Also I'm rushing a bit.  I didn't add no_kernel support but I'll do that 
in a later commit since I want to get the functionality out sooner than 
later.

On 04/06/2018 12:16 PM, Tom St Denis wrote:
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
> ---
>   src/lib/wave_status.c | 18 +++++++++++++++---
>   1 file changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/src/lib/wave_status.c b/src/lib/wave_status.c
> index 92ce624c07a9..e2081bcd2377 100644
> --- a/src/lib/wave_status.c
> +++ b/src/lib/wave_status.c
> @@ -101,7 +101,7 @@ static int read_wave_status_via_mmio(struct umr_asic *asic, uint32_t simd, uint3
>   
>   static int umr_get_wave_status_vi(struct umr_asic *asic, unsigned se, unsigned sh, unsigned cu, unsigned simd, unsigned wave, struct umr_wave_status *ws)
>   {
> -	uint32_t x, value, buf[32];
> +	uint32_t x, value, buf[64];
>   
>   	memset(buf, 0, sizeof buf);
>   
> @@ -121,8 +121,8 @@ static int umr_get_wave_status_vi(struct umr_asic *asic, unsigned se, unsigned s
>   		umr_grbm_select_index(asic, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF);
>   	}
>   
> -	if (buf[0] != 0) {
> -		fprintf(stderr, "[ERROR]: Was expecting type 0 wave data on a CZ/VI part!\n");
> +	if (buf[0] != 0 && buf[0] != 4) {
> +		fprintf(stderr, "[ERROR]: Was expecting type 0 or 4 wave data on a CZ/VI part!\n");
>   		return -1;
>   	}
>   
> @@ -200,6 +200,18 @@ static int umr_get_wave_status_vi(struct umr_asic *asic, unsigned se, unsigned s
>   	ws->ib_dbg0 = buf[x++];
>   	ws->m0 = buf[x++];
>   
> +	if (buf[0] == 4) {
> +		unsigned y;
> +		// we have TTMP registers
> +		ws->have_ttmp = 1;
> +		for (y = 0; y < 12; y++) {
> +			ws->ttmp[y] = buf[x++];
> +		}
> +	} else {
> +		ws->have_ttmp = 0;
> +		memset(ws->ttmp, 0, sizeof(ws->ttmp));
> +	}
> +
>   	return 0;
>   }
>   
>