[PATCH umr] Add SQ_WAVE_TTMP registers to no_kernel code path

[Tom St Denis]

Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
---
 src/lib/wave_status.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/lib/wave_status.c b/src/lib/wave_status.c
index 3b537abefcc8..516e8d33a948 100644
--- a/src/lib/wave_status.c
+++ b/src/lib/wave_status.c
@@ -73,8 +73,10 @@ static uint32_t wave_read_ind(struct umr_asic *asic, uint32_t simd, uint32_t wav
 
 static int read_wave_status_via_mmio(struct umr_asic *asic, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
 {
-	/* type 0/1 wave data */
-	dst[(*no_fields)++] = (asic->family <= FAMILY_VI) ? 0 : 1;
+	unsigned x;
+
+	/* type 4/3 wave data */
+	dst[(*no_fields)++] = (asic->family <= FAMILY_VI) ? 4 : 3;
 	dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_STATUS")->addr);
 	dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_PC_LO")->addr);
 	dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_PC_HI")->addr);
@@ -95,6 +97,9 @@ static int read_wave_status_via_mmio(struct umr_asic *asic, uint32_t simd, uint3
 	}
 	dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_IB_DBG0")->addr);
 	dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_M0")->addr);
+	for (x = 0; x < ((asic->family > FAMILY_VI) ? 16 : 12); x++) {
+		dst[(*no_fields)++] = wave_read_ind(asic, simd, wave, umr_find_reg_data(asic, "ixSQ_WAVE_TTMP0")->addr + x);
+	}
 
 	return 0;
 }
-- 
2.14.3