Add SQ_WAVE_TTMPx support for gfx9

Tom St Denis tstdenis at amd.com
Sat Apr 7 14:36:33 UTC 2018


Oh derp, now I get your point (I'm in the middle of making a homebrew 
AVR development board from a PCB I designed so I didn't read your 
previous email right).

Yup, ok then let's drop the kernel patches and I'll work on umr patches 
on Monday.

Sorry for the confusion.

Thanks,
Tom

On 04/07/2018 10:33 AM, Nicolai Hähnle wrote:
> I don't think this is the right approach.
> 
> TTMPs are really just SGPRs. They're only special because access to them 
> is restricted to trap handlers.
> 
> Note how the index ixSQ_WAVE_TTMP0 is 0x26c. 0x200 is the base for 
> reading SGPRs, and 0x6c is the operand encoding of TTMP0.
> 
> I think umr should just use the SGPR read path with the correct index.
> 
> Thanks,
> Nicolai
> 
> On 06.04.2018 16:51, Tom St Denis wrote:
>> Patches attached for both umr/kernel.
>>
>> Tested on my Raven1.  I'll circle back to adding gfx8 after lunch.
>>
>> Tom
>>
>>
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>>
> 
> 


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