[PATCH] drm/amd/pp: Fix bug not sync with firmware when update pptable

[Deucher, Alexander]

Please provide a better message body.  E.g.,


Lock the dpm levels when we modify the dpm tables to avoid a possible race with the smu.


With that:

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>


________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu at amd.com>
Sent: Friday, February 9, 2018 3:49 AM
To: amd-gfx at lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: Fix bug not sync with firmware when update pptable

Change-Id: Ibb250af8a8cf2af0c30acbad16a354ed0dffa130
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 79a14de..5c1e445 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4689,20 +4689,26 @@ static int smu7_set_power_profile_state(struct pp_hwmgr *hwmgr,
         if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_AUTO)
                 return -EINVAL;

-       tmp_result = smu7_freeze_sclk_mclk_dpm(hwmgr);
-       PP_ASSERT_WITH_CODE(!tmp_result,
-                       "Failed to freeze SCLK MCLK DPM!",
-                       result = tmp_result);
+       if (smum_is_dpm_running(hwmgr) {
+               if (!data->sclk_dpm_key_disabled )
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
+
+               if (!data->mclk_dpm_key_disabled)
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
+       }

         tmp_result = smum_populate_requested_graphic_levels(hwmgr, request);
         PP_ASSERT_WITH_CODE(!tmp_result,
                         "Failed to populate requested graphic levels!",
                         result = tmp_result);

-       tmp_result = smu7_unfreeze_sclk_mclk_dpm(hwmgr);
-       PP_ASSERT_WITH_CODE(!tmp_result,
-                       "Failed to unfreeze SCLK MCLK DPM!",
-                       result = tmp_result);
+       if (smum_is_dpm_running(hwmgr) {
+               if (!data->sclk_dpm_key_disabled )
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
+
+               if (!data->mclk_dpm_key_disabled)
+                       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);
+       }

         smu7_find_min_clock_masks(hwmgr, &sclk_mask, &mclk_mask,
                         request->min_sclk, request->min_mclk);
--
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx at lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20180209/cc27e786/attachment.html>