[PATCH] drm/amdgpu: Map all visible VRAM at startup

Amber Lin Amber.Lin at amd.com
Tue Feb 27 15:22:16 UTC 2018


When using CPU to update page table, we need to kmap all the PDs/PTs after
they are allocated and that requires a TLB shot down on each CPU, which is
quite heavy.

Instead, we map the whole visible VRAM to a kernel address at once. Pages
can be obtained from the offset.

Change-Id: I56574bd544dae273da50e8b5dd6894cd5d9454bd
Signed-off-by: Amber Lin <Amber.Lin at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h    | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 7 +++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 5 +++++
 3 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 893c249..503672d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -77,6 +77,7 @@ struct amdgpu_gmc_funcs {
 struct amdgpu_gmc {
 	resource_size_t		aper_size;
 	resource_size_t		aper_base;
+	void __iomem		*aper_base_kaddr;
 	/* for some chips with <= 32MB we need to lie
 	 * about vram size near mc fb location */
 	u64			mc_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 216799cc..56c7870 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -829,6 +829,10 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
 	/* Add an MTRR for the VRAM */
 	adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,
 					      adev->gmc.aper_size);
+#ifdef CONFIG_64BIT
+	adev->gmc.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
+					adev->gmc.visible_vram_size);
+#endif
 	DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 		 adev->gmc.mc_vram_size >> 20,
 		 (unsigned long long)adev->gmc.aper_size >> 20);
@@ -842,6 +846,9 @@ void amdgpu_bo_fini(struct amdgpu_device *adev)
 	amdgpu_ttm_fini(adev);
 	arch_phys_wc_del(adev->gmc.vram_mtrr);
 	arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
+	if (adev->gmc.aper_base_kaddr)
+		iounmap(adev->gmc.aper_base_kaddr);
+	adev->gmc.aper_base_kaddr = NULL;
 }
 
 int amdgpu_bo_fbdev_mmap(struct amdgpu_bo *bo,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e38e6db..cde639d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -621,6 +621,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
 {
 	struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
+	struct drm_mm_node *mm_node = mem->mm_node;
 
 	mem->bus.addr = NULL;
 	mem->bus.offset = 0;
@@ -640,6 +641,10 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
 		/* check if it's visible */
 		if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size)
 			return -EINVAL;
+		if (adev->gmc.aper_base_kaddr &&
+			(mm_node->size == mem->num_pages)) /* contiguous mem */
+			mem->bus.addr = ((u8 *)adev->gmc.aper_base_kaddr +
+						mem->bus.offset);
 		mem->bus.base = adev->gmc.aper_base;
 		mem->bus.is_iomem = true;
 		break;
-- 
2.7.4



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