[PATCH] drm/amd/powerplay: fix power over limit on Fiji

Zhu, Rex Rex.Zhu at amd.com
Tue Feb 27 23:33:45 UTC 2018


Good. I will follow in new power profile implementation.


Best Regards

Rex




________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Felix Kuehling <felix.kuehling at amd.com>
Sent: Wednesday, February 28, 2018 5:01 AM
To: amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/powerplay: fix power over limit on Fiji

Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>


On 2018-02-27 03:57 PM, Eric Huang wrote:
> power containment disabled only on Fiji and compute
> power profile. It violates PCIe spec and may cause power
> supply failed. Enabling it will fix the issue, even the
> fix will drop performance of some compute tests.
>
> Signed-off-by: Eric Huang <JinHuiEric.Huang at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 7 -------
>  1 file changed, 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 535d786..731475b 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -4630,13 +4630,6 @@ static int smu7_set_power_profile_state(struct pp_hwmgr *hwmgr,
>        int tmp_result, result = 0;
>        uint32_t sclk_mask = 0, mclk_mask = 0;
>
> -     if (hwmgr->chip_id == CHIP_FIJI) {
> -             if (request->type == AMD_PP_GFX_PROFILE)
> -                     smu7_enable_power_containment(hwmgr);
> -             else if (request->type == AMD_PP_COMPUTE_PROFILE)
> -                     smu7_disable_power_containment(hwmgr);
> -     }
> -
>        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_AUTO)
>                return -EINVAL;
>

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