[PATCH 1/8] drm/amd/pp: Add a new pp feature mask bit for OD feature
Grazvydas Ignotas
notasas at gmail.com
Tue Jan 16 17:53:08 UTC 2018
On Tue, Jan 16, 2018 at 2:02 PM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> when this bit was set on module load,
> driver will allow the user over/under gpu
> clock and voltage through sysfs.
>
> by default, this bit was not set.
>
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 3 +++
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 ++----
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 7 ++-----
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 ++
> 5 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index e679bb8..508a254 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -120,7 +120,7 @@
> uint amdgpu_sdma_phase_quantum = 32;
> char *amdgpu_disable_cu = NULL;
> char *amdgpu_virtual_display = NULL;
> -uint amdgpu_pp_feature_mask = 0xffffffff;
> +uint amdgpu_pp_feature_mask = 0x2fff;
> int amdgpu_ngg = 0;
> int amdgpu_prim_buf_per_se = 0;
> int amdgpu_pos_buf_per_se = 0;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> index e35bdc5..ebfbbcf 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> @@ -935,6 +935,9 @@ int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr)
> PHM_PlatformCaps_CAC);
> }
>
> + if (hwmgr->feature_mask & PP_OVER_DRIVER_MASK)
PP_OVERDRIVE_MASK? I believe "overdrive" is a single word.
GraÅžvydas
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