GFXv8/Polaris on big endian

Marcus Comstedt marcus at
Tue Jun 12 14:25:54 UTC 2018


I have an RX 550 (Polaris 12) card which works fine on my Talos II
(POWER9) in little endian mode, but not in big endian mode.  So I wanted
to try and help out to make the driver work in BE mode as well (comments
in the driver code seem to suggest the author did not have a BE system
to test on).

After some work I have the SMU and firmware loading parts working fine
(patch at if anyone is curious),
but the gfx ring is posing a bit of a stumbling block.

I have the rptr/wptr and doorbell stuff figured out, and if I byteswap
the commands as I write them to the ring (i.e. adding a cpu_to_le32 in
amdgpu_ring_write), then the ring test passes just fine.  However,
looking at the drivers for older boards, I don't think this is the
right approach.  Instead, a hardware function to make the GPU swap the
commands itself should be activated.  For example in the v6 driver,
which is for cards I believe work on BE, this is (AFAICT) done by
setting the BUF_SWAP field in CP_RB0_CNTL to 32BIT (2).

There is corresponding code in the v8 driver:

#ifdef __BIG_ENDIAN
        tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, BUF_SWAP, 1);
        WREG32(mmCP_RB0_CNTL, tmp);

Which only differs in that a different value (1 instead of 2) is written
to the field.  However, I can not seem to get this to work.  I have
written all possible values (0-3, as the field is 2-bit) to the field
but it appears to have no effect.  If I write swapped values to the ring
then the ring test passes, which should not be the case if the HW is
also swapping.

Does anyone have any idea what could be wrong here?  Is the register
documentation available somewhere?  Could there be a firmware bug?

I would prefer to get this working without swapping the words in
amdgpu_write as that would break compatibility with the older drivers...


   // Marcus

Marcus Comstedt                          Lysator Academic Computer Society
marcus at                    Linköping University, Sweden   //

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