[PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

Deng, Emily Emily.Deng at amd.com
Tue Mar 6 10:05:16 UTC 2018


The sdma v4 doesn't have the issue about the conflict between doorbell and sdma wptr polling.

Best Wishes,
Emily Deng



> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of zhoucm1
> Sent: Tuesday, March 06, 2018 6:03 PM
> To: Deng, Emily <Emily.Deng at amd.com>; amd-gfx at lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: Clean sdma wptr register when only
> enable wptr polling
> 
> How about other sdma version? like sdma v4 etc.
> 
> 
> Regards,
> 
> David Zhou
> 
> 
> On 2018年03月06日 17:59, Emily Deng wrote:
> > The sdma wptr polling memory is not fast enough, then the sdma wptr
> > register will be random, and not equal to sdma rptr, which will cause
> > sdma engine hang when load driver, so clean up the sdma wptr directly
> > to fix this issue.
> >
> > Signed-off-by: Emily Deng <Emily.Deng at amd.com>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 5 +++--
> >   1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> > index 521978c..2a27928 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> > @@ -719,11 +719,12 @@ static int sdma_v3_0_gfx_resume(struct
> amdgpu_device *adev)
> >   		WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI +
> sdma_offsets[i],
> >   		       upper_32_bits(wptr_gpu_addr));
> >   		wptr_poll_cntl =
> RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]);
> > -		if (ring->use_pollmem)
> > +		if (ring->use_pollmem) {
> > +			WREG32(mmSDMA0_GFX_RB_WPTR +
> sdma_offsets[i], 0);
> >   			wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
> >
> SDMA0_GFX_RB_WPTR_POLL_CNTL,
> >   						       ENABLE, 1);
> > -		else
> > +		} else
> >   			wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
> >
> SDMA0_GFX_RB_WPTR_POLL_CNTL,
> >   						       ENABLE, 0);
> 
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