[PATCH] drm/amdgpu: Clean sdma wptr register when only enable wptr polling

[Christian König]

Am 06.03.2018 um 10:59 schrieb Emily Deng:
> The sdma wptr polling memory is not fast enough, then the sdma
> wptr register will be random, and not equal to sdma rptr, which
> will cause sdma engine hang when load driver, so clean up the sdma
> wptr directly to fix this issue.
>
> Signed-off-by: Emily Deng <Emily.Deng at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index 521978c..2a27928 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -719,11 +719,12 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
>   		WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i],
>   		       upper_32_bits(wptr_gpu_addr));
>   		wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]);
> -		if (ring->use_pollmem)
> +		if (ring->use_pollmem) {
> +			WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
>   			wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
>   						       SDMA0_GFX_RB_WPTR_POLL_CNTL,
>   						       ENABLE, 1);
> -		else
> +		} else

According to the coding style you should use "} else {" here.

Apart from that the patch looks good to me,
Christian.

>   			wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,
>   						       SDMA0_GFX_RB_WPTR_POLL_CNTL,
>   						       ENABLE, 0);