[PATCH v2 2/2] drm/amd/display: Support amdgpu "max bpc" connector property

[Alex Deucher]

On Wed, Nov 7, 2018 at 12:50 PM Nicholas Kazlauskas
<nicholas.kazlauskas at amd.com> wrote:
>
> [Why]
> Many panels support more than 8bpc but some modes are unavailable while
> running at greater than 8bpc due to DP/HDMI bandwidth constraints.
>
> Support for more than 8bpc was added recently in the driver but it
> defaults to the maximum supported bpc - locking out these modes.
>
> This should be a user configurable option such that the user can select
> what bpc configuration they would like.
>
> [How]
> This patch adds support for getting and setting the amdgpu driver
> specific "max bpc" property on the connector.
>
> It also adds support for limiting the output bpc based on the property
> value. The default limitation is the lowest value in the range, 8bpc.
> This was the old value before the range was uncapped.
>
> This patch should be updated/replaced later once common drm support
> for max bpc lands.
>
> Bugzilla: https://bugs.freedesktop.org/108542
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=201585
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=200645
> Fixes: e03fd3f300f6 ("drm/amd/display: Do not limit color depth to 8bpc")
>
> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

Series is:
Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c    | 16 ++++++++++++++++
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h    |  1 +
>  2 files changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index c440d967db57..6b746afc55e7 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2417,8 +2417,15 @@ static void update_stream_scaling_settings(const struct drm_display_mode *mode,
>  static enum dc_color_depth
>  convert_color_depth_from_display_info(const struct drm_connector *connector)
>  {
> +       struct dm_connector_state *dm_conn_state =
> +               to_dm_connector_state(connector->state);
>         uint32_t bpc = connector->display_info.bpc;
>
> +       /* TODO: Remove this when there's support for max_bpc in drm */
> +       if (dm_conn_state && bpc > dm_conn_state->max_bpc)
> +               /* Round down to nearest even number. */
> +               bpc = dm_conn_state->max_bpc - (dm_conn_state->max_bpc & 1);
> +
>         switch (bpc) {
>         case 0:
>                 /*
> @@ -3001,6 +3008,9 @@ int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connector,
>         } else if (property == adev->mode_info.underscan_property) {
>                 dm_new_state->underscan_enable = val;
>                 ret = 0;
> +       } else if (property == adev->mode_info.max_bpc_property) {
> +               dm_new_state->max_bpc = val;
> +               ret = 0;
>         } else if (property == adev->mode_info.freesync_property) {
>                 dm_new_state->freesync_enable = val;
>                 ret = 0;
> @@ -3049,6 +3059,9 @@ int amdgpu_dm_connector_atomic_get_property(struct drm_connector *connector,
>         } else if (property == adev->mode_info.underscan_property) {
>                 *val = dm_state->underscan_enable;
>                 ret = 0;
> +       } else if (property == adev->mode_info.max_bpc_property) {
> +               *val = dm_state->max_bpc;
> +               ret = 0;
>         } else if (property == adev->mode_info.freesync_property) {
>                 *val = dm_state->freesync_enable;
>                 ret = 0;
> @@ -3864,6 +3877,9 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
>         drm_object_attach_property(&aconnector->base.base,
>                                 adev->mode_info.underscan_vborder_property,
>                                 0);
> +       drm_object_attach_property(&aconnector->base.base,
> +                               adev->mode_info.max_bpc_property,
> +                               0);
>
>         if (connector_type == DRM_MODE_CONNECTOR_HDMIA ||
>             connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index 23f2d05cf07e..afcb9842bb45 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -252,6 +252,7 @@ struct dm_connector_state {
>         enum amdgpu_rmx_type scaling;
>         uint8_t underscan_vborder;
>         uint8_t underscan_hborder;
> +       uint8_t max_bpc;
>         bool underscan_enable;
>         bool freesync_enable;
>         bool freesync_capable;
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx