[PATCH 3/6] drm/amdgpu: add amdgpu_ring_get_valid_rings helper

[Alex Deucher]

Returns the number of valid rings (i.e., ready for work) for
a particular engine type. Optionally returns an array of rings
as well.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 95 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h |  3 +
 2 files changed, 98 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 5b75bdc8dc28..c25fcbc2603e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -526,3 +526,98 @@ int amdgpu_ring_test_helper(struct amdgpu_ring *ring)
 	ring->sched.ready = !r;
 	return r;
 }
+
+unsigned amdgpu_ring_get_valid_rings(struct amdgpu_device *adev,
+				     int hw_ip, struct amdgpu_ring **rings)
+{
+	unsigned num_rings = 0;
+	int i, j;
+
+	switch (hw_ip) {
+	case AMDGPU_HW_IP_GFX:
+		for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
+			if (adev->gfx.gfx_ring[i].sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->gfx.gfx_ring[i];
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_COMPUTE:
+		for (i = 0; i < adev->gfx.num_compute_rings; i++) {
+			if (adev->gfx.compute_ring[i].sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->gfx.compute_ring[i];
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_DMA:
+		for (i = 0; i < adev->sdma.num_instances; i++) {
+			if (adev->sdma.instance[i].ring.sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->sdma.instance[i].ring;
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_UVD:
+		for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
+			if (adev->uvd.harvest_config & (1 << i))
+				continue;
+			if (adev->uvd.inst[i].ring.sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->uvd.inst[i].ring;
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_VCE:
+		for (i = 0; i < adev->vce.num_rings; i++) {
+			if (adev->vce.ring[i].sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->vce.ring[i];
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_UVD_ENC:
+		for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
+			if (adev->uvd.harvest_config & (1 << i))
+				continue;
+			for (j = 0; j < adev->uvd.num_enc_rings; j++) {
+				if (adev->uvd.inst[i].ring_enc[j].sched.ready) {
+					if (rings)
+						rings[num_rings] = &adev->uvd.inst[i].ring_enc[j];
+					num_rings++;
+				}
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_VCN_DEC:
+		if (adev->vcn.ring_dec.sched.ready) {
+			if (rings)
+				rings[num_rings] = &adev->vcn.ring_dec;
+			num_rings++;
+		}
+		break;
+	case AMDGPU_HW_IP_VCN_ENC:
+		for (i = 0; i < adev->vcn.num_enc_rings; i++) {
+			if (adev->vcn.ring_enc[i].sched.ready) {
+				if (rings)
+					rings[num_rings] = &adev->vcn.ring_enc[i];
+				num_rings++;
+			}
+		}
+		break;
+	case AMDGPU_HW_IP_VCN_JPEG:
+		if (adev->vcn.ring_jpeg.sched.ready) {
+			if (rings)
+				rings[num_rings] = &adev->vcn.ring_jpeg;
+			num_rings++;
+		}
+		break;
+	}
+
+	return num_rings;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 0beb01fef83f..f3fb26644d65 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -315,4 +315,7 @@ static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,
 
 int amdgpu_ring_test_helper(struct amdgpu_ring *ring);
 
+unsigned amdgpu_ring_get_valid_rings(struct amdgpu_device *adev,
+				     int hw_ip, struct amdgpu_ring **rings);
+
 #endif
-- 
2.13.6