[PATCH 4/6] drm/amdgpu: convert amdgpu_ctx_init to use the new helper

[Alex Deucher]

Use the new helper to get the valid ring count and array.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 62 ++-------------------------------
 1 file changed, 2 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index d12eb863285b..9d2dfa5b83ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -74,7 +74,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
 			   struct amdgpu_ctx *ctx)
 {
 	unsigned num_entities = amdgput_ctx_total_num_entities();
-	unsigned i, j, k;
+	unsigned i, j;
 	int r;
 
 	if (priority < 0 || priority >= DRM_SCHED_PRIORITY_MAX)
@@ -125,65 +125,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
 		struct drm_sched_rq *rqs[AMDGPU_MAX_RINGS];
 		unsigned num_rings = 0;
 
-		switch (i) {
-		case AMDGPU_HW_IP_GFX:
-			for (j = 0; j < adev->gfx.num_gfx_rings; j++) {
-				if (adev->gfx.gfx_ring[j].sched.ready)
-					rings[num_rings++] = &adev->gfx.gfx_ring[j];
-			}
-			break;
-		case AMDGPU_HW_IP_COMPUTE:
-			for (j = 0; j < adev->gfx.num_compute_rings; ++j) {
-				if (adev->gfx.compute_ring[j].sched.ready)
-					rings[num_rings++] = &adev->gfx.compute_ring[j];
-			}
-			break;
-		case AMDGPU_HW_IP_DMA:
-			for (j = 0; j < adev->sdma.num_instances; ++j) {
-				if (adev->sdma.instance[j].ring.sched.ready)
-					rings[num_rings++] = &adev->sdma.instance[j].ring;
-			}
-			break;
-		case AMDGPU_HW_IP_UVD:
-			for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
-				if (adev->uvd.harvest_config & (1 << j))
-					continue;
-
-				if (adev->uvd.inst[j].ring.sched.ready)
-					rings[num_rings++] = &adev->uvd.inst[j].ring;
-			}
-			break;
-		case AMDGPU_HW_IP_VCE:
-			for (j = 0; j < adev->vce.num_rings; j++) {
-				if (adev->vce.ring[j].sched.ready)
-					rings[num_rings++] = &adev->vce.ring[j];
-			}
-			break;
-		case AMDGPU_HW_IP_UVD_ENC:
-			for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
-				if (adev->uvd.harvest_config & (1 << j))
-					continue;
-				for (k = 0; k < adev->uvd.num_enc_rings; k++) {
-					if (adev->uvd.inst[j].ring_enc[k].sched.ready)
-						rings[num_rings++] = &adev->uvd.inst[j].ring_enc[k];
-				}
-			}
-			break;
-		case AMDGPU_HW_IP_VCN_DEC:
-			if (adev->vcn.ring_dec.sched.ready)
-				rings[num_rings++] = &adev->vcn.ring_dec;
-			break;
-		case AMDGPU_HW_IP_VCN_ENC:
-			for (j = 0; j < adev->vcn.num_enc_rings; j++) {
-				if (adev->vcn.ring_enc[j].sched.ready)
-					rings[num_rings++] = &adev->vcn.ring_enc[j];
-			}
-			break;
-		case AMDGPU_HW_IP_VCN_JPEG:
-			if (adev->vcn.ring_jpeg.sched.ready)
-				rings[num_rings++] = &adev->vcn.ring_jpeg;
-			break;
-		}
+		num_rings = amdgpu_ring_get_valid_rings(adev, i, rings);
 
 		/* if there are no rings, then the IP doesn't exist or is disabled  */
 		if (num_rings == 0)
-- 
2.13.6