[PATCH libdrm] amdgpu: add VM test to exercise max/min address space

[Deucher, Alexander]

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Christian König <ckoenig.leichtzumerken at gmail.com>
Sent: Friday, October 26, 2018 6:59:21 AM
To: amd-gfx at lists.freedesktop.org
Subject: [PATCH libdrm] amdgpu: add VM test to exercise max/min address space

Make sure the kernel doesn't crash if we map something at the minimum/maximum address.

Signed-off-by: Christian König <christian.koenig at amd.com>
---
 tests/amdgpu/vm_tests.c | 45 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/tests/amdgpu/vm_tests.c b/tests/amdgpu/vm_tests.c
index 7b6dc5d6..bbdeef4d 100644
--- a/tests/amdgpu/vm_tests.c
+++ b/tests/amdgpu/vm_tests.c
@@ -31,8 +31,8 @@ static  amdgpu_device_handle device_handle;
 static  uint32_t  major_version;
 static  uint32_t  minor_version;

-
 static void amdgpu_vmid_reserve_test(void);
+static void amdgpu_vm_mapping_test(void);

 CU_BOOL suite_vm_tests_enable(void)
 {
@@ -84,6 +84,7 @@ int suite_vm_tests_clean(void)

 CU_TestInfo vm_tests[] = {
         { "resere vmid test",  amdgpu_vmid_reserve_test },
+       { "vm mapping test",  amdgpu_vm_mapping_test },
         CU_TEST_INFO_NULL,
 };

@@ -167,3 +168,45 @@ static void amdgpu_vmid_reserve_test(void)
         r = amdgpu_cs_ctx_free(context_handle);
         CU_ASSERT_EQUAL(r, 0);
 }
+
+static void amdgpu_vm_mapping_test(void)
+{
+       struct amdgpu_bo_alloc_request req = {0};
+       struct drm_amdgpu_info_device dev_info;
+       const uint64_t size = 4096;
+       amdgpu_bo_handle buf;
+       uint64_t addr;
+       int r;
+
+       req.alloc_size = size;
+       req.phys_alignment = 0;
+       req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
+       req.flags = 0;
+
+       r = amdgpu_bo_alloc(device_handle, &req, &buf);
+       CU_ASSERT_EQUAL(r, 0);
+
+       r = amdgpu_query_info(device_handle, AMDGPU_INFO_DEV_INFO,
+                             sizeof(dev_info), &dev_info);
+       CU_ASSERT_EQUAL(r, 0);
+
+       addr = dev_info.virtual_address_offset;
+       r = amdgpu_bo_va_op(buf, 0, size, addr, 0, AMDGPU_VA_OP_MAP);
+       CU_ASSERT_EQUAL(r, 0);
+
+       addr = dev_info.virtual_address_max - size;
+       r = amdgpu_bo_va_op(buf, 0, size, addr, 0, AMDGPU_VA_OP_MAP);
+       CU_ASSERT_EQUAL(r, 0);
+
+       if (dev_info.high_va_offset) {
+               addr = dev_info.high_va_offset;
+               r = amdgpu_bo_va_op(buf, 0, size, addr, 0, AMDGPU_VA_OP_MAP);
+               CU_ASSERT_EQUAL(r, 0);
+
+               addr = dev_info.high_va_max - size;
+               r = amdgpu_bo_va_op(buf, 0, size, addr, 0, AMDGPU_VA_OP_MAP);
+               CU_ASSERT_EQUAL(r, 0);
+       }
+
+       amdgpu_bo_free(buf);
+}
--
2.17.1

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