[PATCH 4/9] drm/amdgpu: enable hdp clock gating for Arcturus
Le Ma
le.ma at amd.com
Thu Aug 8 10:21:51 UTC 2019
Init hdp MGCG/LS flag as Vega20
Change-Id: Ia33ca064f79ac409c53d3beb6f01b6e814a92041
Signed-off-by: Le Ma <le.ma at amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 4fbaca3..6038dce 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1017,7 +1017,9 @@ static int soc15_common_early_init(void *handle)
AMD_CG_SUPPORT_GFX_MGLS |
AMD_CG_SUPPORT_GFX_CGCG |
AMD_CG_SUPPORT_GFX_CGLS |
- AMD_CG_SUPPORT_GFX_CP_LS;
+ AMD_CG_SUPPORT_GFX_CP_LS |
+ AMD_CG_SUPPORT_HDP_MGCG |
+ AMD_CG_SUPPORT_HDP_LS;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x32;
break;
--
2.7.4
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