[PATCH 3/3] drm/amd/powerplay: avoid double check feature enabled

[Quan, Evan]

Patch1 & 2 are reviewed-by: Evan Quan <evan.quan at amd.com>

For patch3, for dpm disabled case, "smu_get_dpm_freq_range(smu, clk_type, &min_freq,&max_freq)" will not se the min_freq and max_freq.
That will cause some troubles for the succeeding smu_set_soft_freq_range. Please get that handled properly.

Regards,
Evan
> -----Original Message-----
> From: Wang, Kevin(Yang) <Kevin1.Wang at amd.com>
> Sent: Friday, July 12, 2019 3:00 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Feng, Kenneth <Kenneth.Feng at amd.com>; Quan, Evan
> <Evan.Quan at amd.com>; Wang, Kevin(Yang) <Kevin1.Wang at amd.com>
> Subject: [PATCH 3/3] drm/amd/powerplay: avoid double check feature
> enabled
> 
> the unforce_dpm_levels doesn't need to check feature enable, because the
> smu_get_dpm_freq_range function has check feature logic.
> 
> Change-Id: I6ae62b355aa76a00f0f6e164cd9848fb32fc7c12
> Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 23 ++++++++--------------
>  1 file changed, 8 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index 16a4c1ca98cf..895a4e592d5a 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -833,27 +833,20 @@ static int navi10_force_dpm_limit_value(struct
> smu_context *smu, bool highest)
>  	return ret;
>  }
> 
> -static int navi10_unforce_dpm_levels(struct smu_context *smu) {
> -
> +static int navi10_unforce_dpm_levels(struct smu_context *smu) {
>  	int ret = 0, i = 0;
>  	uint32_t min_freq, max_freq;
>  	enum smu_clk_type clk_type;
> 
> -	struct clk_feature_map {
> -		enum smu_clk_type clk_type;
> -		uint32_t	feature;
> -	} clk_feature_map[] = {
> -		{SMU_GFXCLK, SMU_FEATURE_DPM_GFXCLK_BIT},
> -		{SMU_MCLK,   SMU_FEATURE_DPM_UCLK_BIT},
> -		{SMU_SOCCLK, SMU_FEATURE_DPM_SOCCLK_BIT},
> +	enum smu_clk_type clks[] = {
> +		SMU_GFXCLK,
> +		SMU_MCLK,
> +		SMU_SOCCLK,
>  	};
> 
> -	for (i = 0; i < ARRAY_SIZE(clk_feature_map); i++) {
> -		if (!smu_feature_is_enabled(smu,
> clk_feature_map[i].feature))
> -		    continue;
> -
> -		clk_type = clk_feature_map[i].clk_type;
> -
> +	for (i = 0; i < ARRAY_SIZE(clks); i++) {
> +		clk_type = clks[i];
>  		ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq,
> &max_freq);
>  		if (ret)
>  			return ret;
> --
> 2.22.0