[PATCH] drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt

[Deucher, Alexander]

Acked-by: Alex Deucher <alexander.deucher at amd.com>
________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Xiaojie Yuan <xiaojie.yuan at amd.com>
Sent: Thursday, November 14, 2019 4:13 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Long, Gang <Gang.Long at amd.com>; Xiao, Jack <Jack.Xiao at amd.com>; Yuan, Xiaojie <Xiaojie.Yuan at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>
Subject: [PATCH] drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt

50us is not enough to wait for cp ready after gpu reset on some navi asics.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan at amd.com>
Suggested-by: Jack Xiao <Jack.Xiao at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 86db40717d38..7d40c73a5ab7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -2371,7 +2371,17 @@ static void gfx_v10_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable)
                         adev->gfx.gfx_ring[i].sched.ready = false;
         }
         WREG32_SOC15(GC, 0, mmCP_ME_CNTL, tmp);
-       udelay(50);
+
+       for (i = 0; i < adev->usec_timeout; i++) {
+               if (RREG32_SOC15(GC, 0, mmCP_STAT) == 0)
+                       break;
+               udelay(1);
+       }
+
+       if (i >= adev->usec_timeout)
+               DRM_ERROR("failed to %s cp gfx\n", enable ? "unhalt" : "halt");
+
+       return 0;
 }

 static int gfx_v10_0_cp_gfx_load_pfp_microcode(struct amdgpu_device *adev)
--
2.20.1

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