[PATCH] drm/amd/powerplay: bug fix for memory clock request from display

[Xiao, Jack]

Reviewed-by: Jack Xiao <Jack.Xiao at amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Kenneth Feng
Sent: Wednesday, October 16, 2019 4:58 PM
To: amd-gfx at lists.freedesktop.org
Cc: Feng, Kenneth <Kenneth.Feng at amd.com>
Subject: [PATCH] drm/amd/powerplay: bug fix for memory clock request from display

In some cases, display fixes memory clock frequency to a high value rather than the natural memory clock switching.
When we comes back from s3 resume, the request from display is not reset, this causes the bug which makes the memory clock goes into a low value.
Then due to the insuffcient memory clock, the screen flicks.

Signed-off-by: Kenneth Feng <kenneth.feng at amd.com>
---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e2a03f4..ee374df 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -1354,6 +1354,8 @@ static int smu_resume(void *handle)
 	if (smu->is_apu)
 		smu_set_gfx_cgpg(&adev->smu, true);
 
+	smu->disable_uclk_switch = 0;
+
 	mutex_unlock(&smu->mutex);
 
 	pr_info("SMU is resumed successfully!\n");
--
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx at lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx