[PATCH 1/3] drm/amdgpu: Export setup_vm_pt_regs() logic for gfxhub 2.0

[Kuehling, Felix]

For GFXv9 you made an equivalent change for both GFXHub and MMHub 
("drm/amdgpu: Expose *_setup_vm_pt_regs for kfd to use"). Your GFXv9 
commit was also reviewed by Alex and Christian. You should get at least 
one of them to Ack or Review this change.

For GFXv10 you're only changing the GFXHub. I suspect that's because KFD 
doesn't care about MMHub on GFXv10. That's fine with me.

You can add
Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>

Thanks,
   Felix

On 2019-09-25 2:15 p.m., Zhao, Yong wrote:
> The KFD code will call this function later.
>
> Change-Id: I88a53368cdee719b2c75393e5cdbd8290584548e
> Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 20 ++++++++++++--------
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h |  2 ++
>   2 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> index a9238735d361..b601c6740ef5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> @@ -46,21 +46,25 @@ u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev)
>   	return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24;
>   }
>   
> -static void gfxhub_v2_0_init_gart_pt_regs(struct amdgpu_device *adev)
> +void gfxhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t page_table_base)
>   {
> -	uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
> +	/* two registers distance between mmGCVM_CONTEXT0_* to mmGCVM_CONTEXT1_* */
> +	int offset = mmGCVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
> +			- mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
>   
> +	WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> +				offset * vmid, lower_32_bits(page_table_base));
>   
> -	WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
> -		     lower_32_bits(value));
> -
> -	WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> -		     upper_32_bits(value));
> +	WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
> +				offset * vmid, upper_32_bits(page_table_base));
>   }
>   
>   static void gfxhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev)
>   {
> -	gfxhub_v2_0_init_gart_pt_regs(adev);
> +	uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
> +
> +	gfxhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base);
>   
>   	WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
>   		     (u32)(adev->gmc.gart_start >> 12));
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h
> index 06807940748b..392b8cd94fc0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h
> @@ -31,5 +31,7 @@ void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev,
>   					  bool value);
>   void gfxhub_v2_0_init(struct amdgpu_device *adev);
>   u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev);
> +void gfxhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
> +				uint64_t page_table_base);
>   
>   #endif