[PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK

Wang, Kevin(Yang) Kevin1.Wang at amd.com
Wed Apr 1 08:27:06 UTC 2020


[AMD Official Use Only - Internal Distribution Only]


________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Yuxian Dai <Yuxian.Dai at amd.com>
Sent: Wednesday, April 1, 2020 3:14 PM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Dai, Yuxian (David) <Yuxian.Dai at amd.com>; Dai, Yuxian (David) <Yuxian.Dai at amd.com>
Subject: [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK

From: "yuxiadai at amd.com" <yuxiadai at amd.com>

1,Using the FCLK DPM table to set the MCLK for DPM states consist of
three entities:
 FCLK
 UCLK
 MEMCLK
All these three clk change together, MEMCLK from FCLK, so use the fclk
frequency.
2,we should show the current working clock freqency from clock table metric

Change-Id: Ia45f3069fc7ae56db495cb5a3865e2c50c550774
Signed-off-by: Yuxian Dai <Yuxian.Dai at amd.com>
---
 drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 7 +++++++
 drivers/gpu/drm/amd/powerplay/renoir_ppt.h | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 7bf52ecba01d..3901b20196d7 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -239,6 +239,7 @@ static int renoir_print_clk_levels(struct smu_context *smu,
         uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
         DpmClocks_t *clk_table = smu->smu_table.clocks_table;
         SmuMetrics_t metrics;
+       bool cur_value_match_level = false;

         if (!clk_table || clk_type >= SMU_CLK_COUNT)
                 return -EINVAL;
@@ -297,7 +298,13 @@ static int renoir_print_clk_levels(struct smu_context *smu,
                 GET_DPM_CUR_FREQ(clk_table, clk_type, i, value);
                 size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
                                 cur_value == value ? "*" : "");
+               if (cur_value == value)
+                       cur_value_match_level = true;
         }
+
+       if (!cur_value_match_level)
+               size += sprintf(buf + size, "   %uMhz *\n",cur_value);
+
[kevin]:
after remove this unnecessary blank line,
Reviewed-by: Kevin Wang <kevin1.wang at amd.com>

         return size;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
index 2a390ddd37dd..89cd6da118a3 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
@@ -37,7 +37,7 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);
                         freq = table->SocClocks[dpm_level].Freq;        \
                         break;                                          \
                 case SMU_MCLK:                                          \
-                       freq = table->MemClocks[dpm_level].Freq;        \
+                       freq = table->FClocks[dpm_level].Freq;  \
                         break;                                          \
                 case SMU_DCEFCLK:                                       \
                         freq = table->DcfClocks[dpm_level].Freq;        \
--
2.17.1

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