[PATCH 5/5] drm/amd/pm: widely share the logic for gfx ulv control

[Evan Quan]

Considering the same logic can be applied to Arcturus, Navi1X
and Sienna Cichlid.

Change-Id: I16958d114afbb2433789ca350019fea9b50e1218
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/pm/inc/smu_v11_0.h              |  3 +++
 drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c   | 13 +------------
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c     | 13 +------------
 .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 13 +------------
 drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c      | 11 +++++++++++
 5 files changed, 17 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
index 65363d56e3cc..89d70165ac44 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
@@ -274,5 +274,8 @@ int smu_v11_0_get_current_pcie_link_speed(struct smu_context *smu);
 
 void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics);
 
+int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
+			      bool enablement);
+
 #endif
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index c82ef2872a50..aab83b957246 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -2313,17 +2313,6 @@ static ssize_t arcturus_get_gpu_metrics(struct smu_context *smu,
 	return sizeof(struct gpu_metrics_v1_0);
 }
 
-static int arcturus_gfx_ulv_control(struct smu_context *smu,
-				    bool enablement)
-{
-	int ret = 0;
-
-	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
-		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
-
-	return ret;
-}
-
 static const struct pptable_funcs arcturus_ppt_funcs = {
 	/* init dpm */
 	.get_allowed_feature_mask = arcturus_get_allowed_feature_mask,
@@ -2402,7 +2391,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
 	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
 	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
 	.get_gpu_metrics = arcturus_get_gpu_metrics,
-	.gfx_ulv_control = arcturus_gfx_ulv_control,
+	.gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void arcturus_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index c10119f29904..c968f05533d9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2578,17 +2578,6 @@ static int navi10_enable_mgpu_fan_boost(struct smu_context *smu)
 					       NULL);
 }
 
-static int navi10_gfx_ulv_control(struct smu_context *smu,
-				  bool enablement)
-{
-	int ret = 0;
-
-	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
-		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
-
-	return ret;
-}
-
 static const struct pptable_funcs navi10_ppt_funcs = {
 	.get_allowed_feature_mask = navi10_get_allowed_feature_mask,
 	.set_default_dpm_table = navi10_set_default_dpm_table,
@@ -2671,7 +2660,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
 	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
 	.get_gpu_metrics = navi10_get_gpu_metrics,
 	.enable_mgpu_fan_boost = navi10_enable_mgpu_fan_boost,
-	.gfx_ulv_control = navi10_gfx_ulv_control,
+	.gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void navi10_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 3559b33da0c4..45b9defebd07 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -2718,17 +2718,6 @@ static int sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu)
 					       NULL);
 }
 
-static int sienna_cichlid_gfx_ulv_control(struct smu_context *smu,
-					  bool enablement)
-{
-	int ret = 0;
-
-	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
-		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
-
-	return ret;
-}
-
 static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
 	.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
 	.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
@@ -2807,7 +2796,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
 	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
 	.get_gpu_metrics = sienna_cichlid_get_gpu_metrics,
 	.enable_mgpu_fan_boost = sienna_cichlid_enable_mgpu_fan_boost,
-	.gfx_ulv_control = sienna_cichlid_gfx_ulv_control,
+	.gfx_ulv_control = smu_v11_0_gfx_ulv_control,
 };
 
 void sienna_cichlid_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 580889a02a94..f1130a288f1d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1985,3 +1985,14 @@ void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics)
 
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 }
+
+int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
+			      bool enablement)
+{
+	int ret = 0;
+
+	if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
+		ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
+
+	return ret;
+}
-- 
2.28.0