[PATCH] drm/amd/powerplay: fix typos for clk map

[Jiansong Chen]

It should be DCLK1->PPCLK_DCLK_1 and VCLK->PPCLK_VCLK_0.

Signed-off-by: Jiansong Chen <Jiansong.Chen at amd.com>
Change-Id: Ib2239b35840d3774a0e1aa3114d2f965e6d88e7c
---
 drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index cae8e776fafe..87eedd7c28ec 100644
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -128,8 +128,8 @@ static struct cmn2asic_mapping sienna_cichlid_clk_map[SMU_CLK_COUNT] = {
 	CLK_MAP(UCLK,		PPCLK_UCLK),
 	CLK_MAP(MCLK,		PPCLK_UCLK),
 	CLK_MAP(DCLK,		PPCLK_DCLK_0),
-	CLK_MAP(DCLK1,		PPCLK_DCLK_0),
-	CLK_MAP(VCLK,		PPCLK_VCLK_1),
+	CLK_MAP(DCLK1,		PPCLK_DCLK_1),
+	CLK_MAP(VCLK,		PPCLK_VCLK_0),
 	CLK_MAP(VCLK1,		PPCLK_VCLK_1),
 	CLK_MAP(DCEFCLK,	PPCLK_DCEFCLK),
 	CLK_MAP(DISPCLK,	PPCLK_DISPCLK),
-- 
2.17.1