[PATCH] drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing

[Deucher, Alexander]

[AMD Public Use]

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
________________________________
From: Liang, Prike <Prike.Liang at amd.com>
Sent: Monday, June 8, 2020 3:34 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Ray <Ray.Huang at amd.com>; Liang, Prike <Prike.Liang at amd.com>
Subject: [PATCH] drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing

The failed case is no SDMA1 IP for Renoir discovery table while in accessing SDMA1 reg base,
thus need have nullptr test for soc15_read_register invoked in MMR addres space inqure opt.

Signed-off-by: Prike.Liang <Prike.Liang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 623745b..3e406ee 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -415,7 +415,8 @@ static int soc15_read_register(struct amdgpu_device *adev, u32 se_num,
         *value = 0;
         for (i = 0; i < ARRAY_SIZE(soc15_allowed_read_registers); i++) {
                 en = &soc15_allowed_read_registers[i];
-               if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+               if (adev->reg_offset[en->hwip][en->inst] &&
+                       reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
                                         + en->reg_offset))
                         continue;

--
2.7.4

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