[PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3

[Zhuo, Qingqing]

[AMD Public Use]

Updated and sent. Your review would be appreciated!

Thanks,
Lillian

From: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Sent: Thursday, April 15, 2021 12:27 PM
To: Zhuo, Qingqing <Qingqing.Zhuo at amd.com>
Cc: amd-gfx mailing list <amd-gfx at lists.freedesktop.org>; Mark Yacoub <markyacoub at chromium.org>; Deucher, Alexander <Alexander.Deucher at amd.com>; Wheeler, Daniel <Daniel.Wheeler at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com>
Subject: Re: [PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3

Btw please add a fixes tag so it gets directed to stable releases.

Thanks!

On Thu, Apr 15, 2021, 6:06 PM Zhuo, Qingqing <Qingqing.Zhuo at amd.com<mailto:Qingqing.Zhuo at amd.com>> wrote:

[AMD Public Use]

Inline.

From: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl<mailto:bas at basnieuwenhuizen.nl>>
Sent: Thursday, April 15, 2021 7:26 AM
To: Zhuo, Qingqing <Qingqing.Zhuo at amd.com<mailto:Qingqing.Zhuo at amd.com>>
Cc: amd-gfx mailing list <amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org>>; Mark Yacoub <markyacoub at chromium.org<mailto:markyacoub at chromium.org>>; Deucher, Alexander <Alexander.Deucher at amd.com<mailto:Alexander.Deucher at amd.com>>; Wheeler, Daniel <Daniel.Wheeler at amd.com<mailto:Daniel.Wheeler at amd.com>>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com<mailto:Rodrigo.Siqueira at amd.com>>; Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com<mailto:Nicholas.Kazlauskas at amd.com>>
Subject: Re: [PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3



On Thu, Apr 15, 2021 at 1:35 AM Qingqing Zhuo <qingqing.zhuo at amd.com<mailto:qingqing.zhuo at amd.com>> wrote:
[Why]
Current list only includes modifiers where DCC_MAX_COMPRESSED_BLOCK
is set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B
is also supported and used by userspace.

[How]
Add AMD_FMT_MOD_DCC_BLOCK_64B to modifiers with DCC supported.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo at amd.com<mailto:qingqing.zhuo at amd.com>>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e29cb2e956db..c3cbc3d298e7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4535,6 +4535,17 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,
        int pipe_xor_bits = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes);
        int pkrs = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs);

+       add_modifier(mods, size, capacity, AMD_FMT_MOD |
+                   AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
+                   AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
+                   AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
+                   AMD_FMT_MOD_SET(PACKERS, pkrs) |
+                   AMD_FMT_MOD_SET(DCC, 1) |
+                   AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |
+                   AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
+                   AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
+                   AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));

Thanks for finding this issue. Looking at it it looks to me like the original entries are mistaken. Can we just change the  DCC_MAX_COMPRESSED_BLOCK in the already existing DCC entries? Looks like Mesa always uses the AMD_FMT_MOD_DCC_BLOCK_64B anyway, and I don't think DCC_INDEPENDENT_64B=1 + DCC_MAX_COMPRESSED_BLOCK=AMD_FMT_MOD_DCC_BLOCK_128B makes sense.

Thanks for the suggestion. Will send out an updated version soon.

+
        add_modifier(mods, size, capacity, AMD_FMT_MOD |
                    AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
                    AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
@@ -4546,6 +4557,18 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,
                    AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
                    AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B));

+       add_modifier(mods, size, capacity, AMD_FMT_MOD |
+                   AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
+                   AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
+                   AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |
+                   AMD_FMT_MOD_SET(PACKERS, pkrs) |
+                   AMD_FMT_MOD_SET(DCC, 1) |
+                   AMD_FMT_MOD_SET(DCC_RETILE, 1) |
+                   AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |
+                   AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |
+                   AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |
+                   AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));
+
        add_modifier(mods, size, capacity, AMD_FMT_MOD |
                    AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |
                    AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |
--
2.17.1
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