[PATCH] drm/amd/display: Add feature flags to disable LTTPR
Aurabindo Pillai
aurabindo.pillai at amd.com
Wed Dec 8 17:34:27 UTC 2021
Hi Alex,
This patch touches amd_shared.h
Could I get an ack ?
On 12/7/21 12:32 PM, Aurabindo Pillai wrote:
> [Why]
> Allow for disabling non transparent mode of LTTPR for running tests.
>
> [How]
> Add a feature flag and set them during init sequence. The flags are
> already being used in DC.
>
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +++++++
> drivers/gpu/drm/amd/include/amd_shared.h | 4 ++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index d25e5be77dea..9433b9a660e2 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1453,6 +1453,13 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
> if (amdgpu_dc_feature_mask & DC_EDP_NO_POWER_SEQUENCING)
> init_data.flags.edp_no_power_sequencing = true;
>
> +#ifdef CONFIG_DRM_AMD_DC_DCN
> + if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP1_4A)
> + init_data.flags.allow_lttpr_non_transparent_mode.bits.DP1_4A = true;
> + if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0)
> + init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 = true;
> +#endif
> +
> init_data.flags.power_down_display_on_boot = true;
>
> if (check_seamless_boot_capability(adev)) {
> diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
> index 4b9e68a79f06..3c72208b4754 100644
> --- a/drivers/gpu/drm/amd/include/amd_shared.h
> +++ b/drivers/gpu/drm/amd/include/amd_shared.h
> @@ -231,6 +231,10 @@ enum DC_FEATURE_MASK {
> DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2), //0x4, disabled by default
> DC_PSR_MASK = (1 << 3), //0x8, disabled by default for dcn < 3.1
> DC_EDP_NO_POWER_SEQUENCING = (1 << 4), //0x10, disabled by default
> +#ifdef CONFIG_DRM_AMD_DC_DCN
> + DC_DISABLE_LTTPR_DP1_4A = (1 << 5), //0x20, disabled by default
> + DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
> +#endif
> };
>
> enum DC_DEBUG_MASK {
>
More information about the amd-gfx
mailing list