[PATCH 1/1] register refresh to add mmGC_CAC_INDEX_AUTO_INCR_EN

[Tom St Denis]

Hi,

This update doesn't match the gc_9_0_0 headers from the drm-next branch as
such cannot be made to umr.  You need to first update the kernel headers
and then we circle back to umr.

Tom

On Tue, Jan 26, 2021 at 12:43 AM <raykwok1150 at 163.com> wrote:

> From: Guo Lei <raykwok1150 at 163.com>
>
> sync form drm-next
>
> Signed-off-by: Guo Lei <raykwok1150 at 163.com>
> ---
>  src/lib/ip/gfx90_bits.i | 7 ++-----
>  src/lib/ip/gfx90_regs.i | 2 +-
>  2 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/src/lib/ip/gfx90_bits.i b/src/lib/ip/gfx90_bits.i
> index 6741947..8aabb8a 100644
> --- a/src/lib/ip/gfx90_bits.i
> +++ b/src/lib/ip/gfx90_bits.i
> @@ -8711,11 +8711,8 @@ static struct umr_bitfield mmGC_CAC_CTRL_2[] = {
>          { "CAC_SOFT_CTRL_ENABLE", 1, 1, &umr_bitfield_default },
>          { "UNUSED_0", 2, 31, &umr_bitfield_default },
>  };
> -static struct umr_bitfield mmGC_CAC_CGTT_CLK_CTRL[] = {
> -        { "ON_DELAY", 0, 3, &umr_bitfield_default },
> -        { "OFF_HYSTERESIS", 4, 11, &umr_bitfield_default },
> -        { "SOFT_OVERRIDE_DYN", 30, 30, &umr_bitfield_default },
> -        { "SOFT_OVERRIDE_REG", 31, 31, &umr_bitfield_default },
> +static struct umr_bitfield mmGC_CAC_INDEX_AUTO_INCR_EN[] = {
> +        { "GC_CAC_INDEX_AUTO_INCR_EN", 0, 0, &umr_bitfield_default },
>  };
>  static struct umr_bitfield mmGC_CAC_AGGR_LOWER[] = {
>          { "AGGR_31_0", 0, 31, &umr_bitfield_default },
> diff --git a/src/lib/ip/gfx90_regs.i b/src/lib/ip/gfx90_regs.i
> index 1342a66..a9ef9c6 100644
> --- a/src/lib/ip/gfx90_regs.i
> +++ b/src/lib/ip/gfx90_regs.i
> @@ -1418,7 +1418,7 @@
>         { "mmDIDT_IND_DATA", REG_MMIO, 0x1281, 0, &mmDIDT_IND_DATA[0],
> sizeof(mmDIDT_IND_DATA)/sizeof(mmDIDT_IND_DATA[0]), 0, 0 },
>         { "mmGC_CAC_CTRL_1", REG_MMIO, 0x1284, 0, &mmGC_CAC_CTRL_1[0],
> sizeof(mmGC_CAC_CTRL_1)/sizeof(mmGC_CAC_CTRL_1[0]), 0, 0 },
>         { "mmGC_CAC_CTRL_2", REG_MMIO, 0x1285, 0, &mmGC_CAC_CTRL_2[0],
> sizeof(mmGC_CAC_CTRL_2)/sizeof(mmGC_CAC_CTRL_2[0]), 0, 0 },
> -       { "mmGC_CAC_CGTT_CLK_CTRL", REG_MMIO, 0x1286, 0,
> &mmGC_CAC_CGTT_CLK_CTRL[0],
> sizeof(mmGC_CAC_CGTT_CLK_CTRL)/sizeof(mmGC_CAC_CGTT_CLK_CTRL[0]), 0, 0 },
> +       { "mmGC_CAC_INDEX_AUTO_INCR_EN", REG_MMIO, 0x1286, 0,
> &mmGC_CAC_INDEX_AUTO_INCR_EN[0],
> sizeof(mmGC_CAC_INDEX_AUTO_INCR_EN)/sizeof(mmGC_CAC_INDEX_AUTO_INCR_EN[0]),
> 0, 0 },
>         { "mmGC_CAC_AGGR_LOWER", REG_MMIO, 0x1287, 0,
> &mmGC_CAC_AGGR_LOWER[0],
> sizeof(mmGC_CAC_AGGR_LOWER)/sizeof(mmGC_CAC_AGGR_LOWER[0]), 0, 0 },
>         { "mmGC_CAC_AGGR_UPPER", REG_MMIO, 0x1288, 0,
> &mmGC_CAC_AGGR_UPPER[0],
> sizeof(mmGC_CAC_AGGR_UPPER)/sizeof(mmGC_CAC_AGGR_UPPER[0]), 0, 0 },
>         { "mmGC_CAC_SOFT_CTRL", REG_MMIO, 0x128d, 0,
> &mmGC_CAC_SOFT_CTRL[0],
> sizeof(mmGC_CAC_SOFT_CTRL)/sizeof(mmGC_CAC_SOFT_CTRL[0]), 0, 0 },
> --
> 2.17.1
>
>
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