[PATCH 1/7] SWDEV-275015 - drm/amdgpu: Add SMI-LIB ioctl

[Roy Sun]

From: David M Nieto <david.nieto at amd.com>

Add definition for the SMI ioctl

Signed-off-by: David M Nieto <david.nieto at amd.com>
Signed-off-by: Roy Sun <Roy.Sun at amd.com>
---
 include/uapi/drm/amdgpu_drm.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 8b832f7458f2..1d0261239627 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -56,6 +56,7 @@ extern "C" {
 #define DRM_AMDGPU_SCHED		0x15
 /* not upstream */
 #define DRM_AMDGPU_FREESYNC	        0x5d
+#define DRM_AMDGPU_SMI			0x5e
 
 #define DRM_IOCTL_AMDGPU_GEM_CREATE	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
 #define DRM_IOCTL_AMDGPU_GEM_MMAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -74,6 +75,7 @@ extern "C" {
 #define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
 #define DRM_IOCTL_AMDGPU_SCHED		DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
 #define DRM_IOCTL_AMDGPU_FREESYNC	DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
+#define DRM_IOCTL_AMDGPU_SMI		DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_SMI, struct drm_amdgpu_smi)
 
 /**
  * DOC: memory domains
@@ -1138,6 +1140,24 @@ struct drm_amdgpu_freesync {
 	__u32 spare[7];
 };
 
+/* Definition of the SMI handlers */
+#define AMDGPU_SMI_MAX_PAYLOAD 1024
+struct drm_amdgpu_smi_in_hdr {
+	__u32		code;
+	__u16		in_len;
+	__u16		out_len;
+};
+
+struct drm_amdgpu_smi_out_hdr {
+	__s32		status;
+};
+
+struct drm_amdgpu_smi {
+	struct drm_amdgpu_smi_in_hdr	in;
+	struct drm_amdgpu_smi_out_hdr	out;
+	__u64		payload;
+};
+
 #if defined(__cplusplus)
 }
 #endif
-- 
2.29.0