[PATCH] drm/amdgpu: no rlcg read access in SRIOV case for gfx v9

[Deucher, Alexander]

[AMD Official Use Only]

For better future proofing maybe adjust the check to look for pre-gfx10 rather than checking for specific IP versions?  E.g.,

adev->ip_versions[MP0_HWIP][0] < IP_VERSION(10, 0, 0)
________________________________
From: Chen, Guchun <Guchun.Chen at amd.com>
Sent: Thursday, February 10, 2022 1:40 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>; Zhang, Hawking <Hawking.Zhang at amd.com>; Zhou, Peng Ju <PengJu.Zhou at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>
Cc: Chen, Guchun <Guchun.Chen at amd.com>
Subject: [PATCH] drm/amdgpu: no rlcg read access in SRIOV case for gfx v9

Fall back to MMIO to read registers as rlcg read is not
available for gfx v9 in SRIOV configration. Otherwise,
gmc_v9_0_flush_gpu_tlb will always complain timeout and
finally breaks driver load.

Fixes: 0dc4a7e75581("drm/amdgpu: switch to get_rlcg_reg_access_flag for gfx9")
Signed-off-by: Guchun Chen <guchun.chen at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index e1288901beb6..a3274fa1c7e4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -37,6 +37,16 @@
                 vf2pf_info->ucode_info[ucode].version = ver; \
         } while (0)

+static bool amdgpu_virt_is_rlcg_read_supported(struct amdgpu_device *adev)
+{
+       /* rlcg read is not support in SRIOV with gfx v9 */
+       if ((adev->ip_versions[MP0_HWIP][0] == IP_VERSION(9, 0, 0)) ||
+               (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 1)))
+               return false;
+
+       return true;
+}
+
 bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev)
 {
         /* By now all MMIO pages except mailbox are blocked */
@@ -957,7 +967,8 @@ u32 amdgpu_sriov_rreg(struct amdgpu_device *adev,
         u32 rlcg_flag;

         if (!amdgpu_sriov_runtime(adev) &&
-           amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag))
+               amdgpu_virt_is_rlcg_read_supported(adev) &&
+               amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag))
                 return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag);

         if (acc_flags & AMDGPU_REGS_NO_KIQ)
--
2.17.1

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