[PATCH] drm/amd/display: Correct MPC split policy for DCN301

[Liu, Zhan]

[Public]

Apologize for sending out the patch with the wrong email sensitivity policy a few seconds ago. I've updated sensitivity policy to "Public".

Thanks,
Zhan

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Liu, Zhan
> Sent: 2022/January/19, Wednesday 5:17 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Liu, Charlene <Charlene.Liu at amd.com>; Kotarac, Pavle
> <Pavle.Kotarac at amd.com>; Pierre-Loup Griffais <pgriffais at valvesoftware.com>;
> Gutierrez, Agustin <Agustin.Gutierrez at amd.com>; Cornij, Nikola
> <Nikola.Cornij at amd.com>
> Subject: [PATCH] drm/amd/display: Correct MPC split policy for DCN301
>
> [Why]
> DCN301 has seamless boot enabled. With MPC split enabled at the same time,
> system will hang.
>
> [How]
> Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine
> enabled on DCN301, pipe split is not necessary here.
>
> Signed-off-by: Zhan Liu <zhan.liu at amd.com>
> ---
>  drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> index c1c6e602b06c..b4001233867c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv
> = {
>         .disable_clock_gate = true,
>         .disable_pplib_clock_request = true,
>         .disable_pplib_wm_range = true,
> -       .pipe_split_policy = MPC_SPLIT_DYNAMIC,
> +       .pipe_split_policy = MPC_SPLIT_AVOID,
>         .force_single_disp_pipe_split = false,
>         .disable_dcc = DCC_ENABLE,
>         .vsr_support = true,
> --
> 2.25.1