[PATCH 01/12] drm/amdgpu: Write masked value to control register

[André Almeida]

Às 16:14 de 14/07/22, Alex Deucher escreveu:
> On Thu, Jul 14, 2022 at 3:05 PM André Almeida <andrealmeid at igalia.com> wrote:
>>
>> Hi Maíra,
>>
>> Thank you for your patch,
>>
>> Às 13:44 de 14/07/22, Maíra Canal escreveu:
>>> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
>>> should be written into the control register instead of 0.
>>>
>>
>> Why? I do see that tmp was unused before your patch, but why should we
>> write it into this register? Did you manage to test this somehow?
> 
> The patch is correct.  We should only be clearing the enable bit in
> this case, not the entire register.  Clearing the other fields could
> cause spurious hotplug events as it affects the short and long pulse
> times for the HPD pin.
> 

Got it, nice catch Maíra :) Next time, please add this kind of
information in the commit message.