[bug report] drm/amd/display: Synchronize displays with different timings
Dan Carpenter
dan.carpenter at oracle.com
Tue Jul 26 15:21:45 UTC 2022
Hello Vladimir Stempen,
The patch 77a2b7265f20: "drm/amd/display: Synchronize displays with
different timings" from Dec 29, 2020, leads to the following Smatch
static checker warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2199 dcn10_enable_vblanks_synchronization() warn: if statement not indented
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2207 dcn10_enable_vblanks_synchronization() warn: inconsistent indenting
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c
2191 DC_SYNC_INFO("Aligning DP DTOs\n");
2192
2193 master = dcn10_align_pixel_clocks(dc, group_size, grouped_pipes);
2194
2195 DC_SYNC_INFO("Synchronizing VBlanks\n");
2196
2197 if (master >= 0) {
2198 for (i = 0; i < group_size; i++) {
2199 if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)
2200 grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
2201 grouped_pipes[master]->stream_res.tg,
2202 grouped_pipes[i]->stream_res.tg,
2203 grouped_pipes[master]->stream->timing.pix_clk_100hz,
2204 grouped_pipes[i]->stream->timing.pix_clk_100hz,
2205 get_clock_divider(grouped_pipes[master], false),
2206 get_clock_divider(grouped_pipes[i], false));
--> 2207 grouped_pipes[i]->stream->vblank_synchronized = true;
It looks like this is supposed to have curly braces (this code is buggy).
2208 }
2209 grouped_pipes[master]->stream->vblank_synchronized = true;
2210 DC_SYNC_INFO("Sync complete\n");
2211 }
2212
2213 for (i = 1; i < group_size; i++) {
2214 opp = grouped_pipes[i]->stream_res.opp;
2215 tg = grouped_pipes[i]->stream_res.tg;
2216 tg->funcs->get_otg_active_size(tg, &width, &height);
2217 if (opp->funcs->opp_program_dpg_dimensions)
2218 opp->funcs->opp_program_dpg_dimensions(opp, width, height);
2219 }
2220 }
regards,
dan carpenter
More information about the amd-gfx
mailing list