[PATCH] drm/amdgpu/vcn: fix vcn ring test failure in igt reload test

[Yin, Tianci (Rico)]

[AMD Official Use Only]

Thank you for reviewing James!

Regards,
Rico
________________________________
From: Zhu, James <James.Zhu at amd.com>
Sent: Tuesday, March 15, 2022 20:01
To: Yin, Tianci (Rico) <Tianci.Yin at amd.com>; amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Chen, Guchun <Guchun.Chen at amd.com>; Zhu, James <James.Zhu at amd.com>; Wang, Yu (Charlie) <Yu.Wang4 at amd.com>
Subject: Re: [PATCH] drm/amdgpu/vcn: fix vcn ring test failure in igt reload test

This patch is Reviewed-by: James Zhu <James.Zhu at amd.com>

On 2022-03-14 10:33 p.m., Tianci Yin wrote:
> From: "Tianci.Yin" <tianci.yin at amd.com>
>
> [why]
> On Renoir, vcn ring test failed on the second time insmod in the reload
> test. After invetigation, it proves that vcn only can disable dpg under
> dpg unpause mode (dpg unpause mode is default for dec only, dpg pause
> mode is for dec/enc).
>
> [how]
> unpause dpg in dpg stopping procedure.
>
> Change-Id: If6ec3af694e1d6b63ebce386a563f03ca6d291c1
> Signed-off-by: Tianci.Yin <tianci.yin at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 319ac8ea434b..6e0972cd1f2f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -1098,8 +1098,10 @@ static int vcn_v2_0_start(struct amdgpu_device *adev)
>
>   static int vcn_v2_0_stop_dpg_mode(struct amdgpu_device *adev)
>   {
> +     struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};
>        uint32_t tmp;
>
> +     vcn_v2_0_pause_dpg_mode(adev, 0, &state);
>        /* Wait for power status to be 1 */
>        SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,
>                UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20220315/99013c37/attachment-0001.htm>