[PATCH] drm/amd/pm: correct the pcie link state check for SMU13

[Alex Deucher]

On Fri, Apr 7, 2023 at 5:17 AM Evan Quan <evan.quan at amd.com> wrote:
>
> Update the driver implementations to fit those data exposed
> by PMFW.
>
> Signed-off-by: Evan Quan <evan.quan at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> Change-Id: I8579f6b22fb586bb52a6c97b8edfc13c493bd484
> ---
>  drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h         | 6 ++++++
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 4 ++--
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 4 ++--
>  3 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> index 60c719a726ce..e9b14237ae19 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> @@ -62,6 +62,12 @@
>  #define CTF_OFFSET_HOTSPOT             5
>  #define CTF_OFFSET_MEM                 5
>
> +static const int pmfw_decoded_link_speed[5] = {1, 2, 3, 4, 5};
> +static const int pmfw_decoded_link_width[7] = {0, 1, 2, 4, 8, 12, 16};
> +
> +#define DECODE_GEN_SPEED(gen_speed_idx)                (pmfw_decoded_link_speed[gen_speed_idx])
> +#define DECODE_LANE_WIDTH(lane_width_idx)      (pmfw_decoded_link_width[lane_width_idx])
> +
>  struct smu_13_0_max_sustainable_clocks {
>         uint32_t display_clock;
>         uint32_t phy_clock;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index 29c5200356bb..48ba6e2c683c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -1149,8 +1149,8 @@ static int smu_v13_0_0_print_clk_levels(struct smu_context *smu,
>                                         (pcie_table->pcie_lane[i] == 5) ? "x12" :
>                                         (pcie_table->pcie_lane[i] == 6) ? "x16" : "",
>                                         pcie_table->clk_freq[i],
> -                                       ((gen_speed - 1) == pcie_table->pcie_gen[i]) &&
> -                                       (lane_width == link_width[pcie_table->pcie_lane[i]]) ?
> +                                       (gen_speed == DECODE_GEN_SPEED(pcie_table->pcie_gen[i])) &&
> +                                       (lane_width == DECODE_LANE_WIDTH(link_width[pcie_table->pcie_lane[i]])) ?
>                                         "*" : "");
>                 break;
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> index 0559bc88f44c..c0067272651b 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
> @@ -1079,8 +1079,8 @@ static int smu_v13_0_7_print_clk_levels(struct smu_context *smu,
>                                         (pcie_table->pcie_lane[i] == 5) ? "x12" :
>                                         (pcie_table->pcie_lane[i] == 6) ? "x16" : "",
>                                         pcie_table->clk_freq[i],
> -                                       (gen_speed == pcie_table->pcie_gen[i]) &&
> -                                       (lane_width == pcie_table->pcie_lane[i]) ?
> +                                       (gen_speed == DECODE_GEN_SPEED(pcie_table->pcie_gen[i])) &&
> +                                       (lane_width == DECODE_LANE_WIDTH(pcie_table->pcie_lane[i])) ?
>                                         "*" : "");
>                 break;
>
> --
> 2.34.1
>