[PATCH 2/2] drm/amd/display: Program OTG vtotal min/max selectors unconditionally

[Rodrigo Siqueira Jordao]

On 4/21/23 14:39, Aurabindo Pillai wrote:
> [Why&How]

Drop the above line, with that:

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>

> 
> OTG_V_TOTAL_MIN/MAX_SEL bits are required to be programmed to 1 if
> writes to OTG timing registers need to be honoured. This is usually
> needed only when freesync is active. However, SubVP + DRR requires that
> we're able to change timing even without freesync being active (but
> supported). By unconditionally writing this bit to 1, we remove an
> unnecessary dependency so that DMCUB can change OTG timing whenever it wants.
> 
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
> ---
>   drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c | 11 ++---------
>   1 file changed, 2 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> index 2ee798965bc2..6ef56fb32131 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> @@ -245,16 +245,9 @@ static void optc32_set_drr(
>   		}
>   
>   		optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max - 1);
> -		optc32_setup_manual_trigger(optc);
> -	} else {
> -		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
> -				OTG_SET_V_TOTAL_MIN_MASK, 0,
> -				OTG_V_TOTAL_MIN_SEL, 0,
> -				OTG_V_TOTAL_MAX_SEL, 0,
> -				OTG_FORCE_LOCK_ON_EVENT, 0);
> -
> -		optc->funcs->set_vtotal_min_max(optc, 0, 0);
>   	}
> +
> +	optc32_setup_manual_trigger(optc);
>   }
>   
>   static struct timing_generator_funcs dcn32_tg_funcs = {