[PATCH 1/2] drm/amdgpu: remove SRIOV VF FB location programming
Zhigang Luo
Zhigang.Luo at amd.com
Thu Jul 6 16:25:27 UTC 2023
For SRIOV VF, FB location is programmed by host driver, no need to
program it in guest driver.
Signed-off-by: Zhigang Luo <Zhigang.Luo at amd.com>
Change-Id: I2a4838f6703e94bb0bcf3a8e923c69466e37803f
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 15 +--------------
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 12 ------------
2 files changed, 1 insertion(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 47f95ec218a3..03ae661e3b54 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -406,20 +406,6 @@ static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev,
int i;
tmp_mask = xcc_mask;
- /*
- * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, because they are
- * VF copy registers so vbios post doesn't program them, for
- * SRIOV driver need to program them
- */
- if (amdgpu_sriov_vf(adev)) {
- for_each_inst(i, tmp_mask) {
- i = ffs(tmp_mask) - 1;
- WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE,
- adev->gmc.vram_start >> 24);
- WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP,
- adev->gmc.vram_end >> 24);
- }
- }
/* GART Enable. */
gfxhub_v1_2_xcc_init_gart_aperture_regs(adev, xcc_mask);
@@ -606,6 +592,7 @@ static int gfxhub_v1_2_get_xgmi_info(struct amdgpu_device *adev)
max_region =
REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);
+ DRM_INFO("XXXXXX xgmi_lfb_cntl=0x%x seg_size=0x%llx", xgmi_lfb_cntl, seg_size);
max_num_physical_nodes = 8;
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
index 5e8b493f8699..784c4e077470 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
@@ -413,18 +413,6 @@ static void mmhub_v1_8_program_invalidation(struct amdgpu_device *adev)
static int mmhub_v1_8_gart_enable(struct amdgpu_device *adev)
{
- if (amdgpu_sriov_vf(adev)) {
- /*
- * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, becuase they are
- * VF copy registers so vbios post doesn't program them, for
- * SRIOV driver need to program them
- */
- WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_BASE,
- adev->gmc.vram_start >> 24);
- WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_TOP,
- adev->gmc.vram_end >> 24);
- }
-
/* GART Enable. */
mmhub_v1_8_init_gart_aperture_regs(adev);
mmhub_v1_8_init_system_aperture_regs(adev);
--
2.25.1
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