[PATCH 2/2] drm/amdgpu: init TA microcode for SRIOV VF when MP0 IP is 13.0.6

Zhigang Luo Zhigang.Luo at amd.com
Thu Jul 6 16:25:28 UTC 2023


Signed-off-by: Zhigang Luo <Zhigang.Luo at amd.com>
Change-Id: I71524c69c7137c6db4968b95e480c910aba24703
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 21438ff61c6e..de9a2a7f5459 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -145,6 +145,7 @@ static int psp_init_sriov_microcode(struct psp_context *psp)
 		break;
 	case IP_VERSION(13, 0, 6):
 		ret = psp_init_cap_microcode(psp, ucode_prefix);
+		ret &= psp_init_ta_microcode(psp, ucode_prefix);
 		break;
 	case IP_VERSION(13, 0, 10):
 		adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MES1_DATA;
-- 
2.25.1



More information about the amd-gfx mailing list