[PATCH] drm/amd/display: enable/disable PSR feature at run time

[Shirish S]

[Why]
Per current architecture, PSR feature is disabled by default for DCN < 3.
This makes it impossible for those pre-flashed device users to try newer
(psr capable) panels without altering OS (boot params).
Also on Chromebooks its not sustainable to have custom dc_feature_mask.

[How]
amdgpu_dm_set_psr_caps() in its current form does a decent job to evaluate
and discard links that are not capable of PSR feature.
If the current implementation has gap, going forward it needs to be
addressed either by adding appropriate ways to detect and discard the
panels or by iteratively blacklisting the same.

Signed-off-by: Shirish S <shirish.s at amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++-----------------
 1 file changed, 2 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 073bf00c6fdc..0fcafe1a071d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4313,7 +4313,6 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
 	s32 primary_planes;
 	enum dc_connection_type new_connection_type = dc_connection_none;
 	const struct dc_plane_cap *plane;
-	bool psr_feature_enabled = false;
 	int max_overlay = dm->dc->caps.max_slave_planes;
 
 	dm->display_indexes_num = dm->dc->caps.max_streams;
@@ -4405,24 +4404,6 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
 			      adev->ip_versions[DCE_HWIP][0]);
 	}
 
-	/* Determine whether to enable PSR support by default. */
-	if (!(amdgpu_dc_debug_mask & DC_DISABLE_PSR)) {
-		switch (adev->ip_versions[DCE_HWIP][0]) {
-		case IP_VERSION(3, 1, 2):
-		case IP_VERSION(3, 1, 3):
-		case IP_VERSION(3, 1, 4):
-		case IP_VERSION(3, 1, 5):
-		case IP_VERSION(3, 1, 6):
-		case IP_VERSION(3, 2, 0):
-		case IP_VERSION(3, 2, 1):
-			psr_feature_enabled = true;
-			break;
-		default:
-			psr_feature_enabled = amdgpu_dc_feature_mask & DC_PSR_MASK;
-			break;
-		}
-	}
-
 	/* loops over all connectors on the board */
 	for (i = 0; i < link_cnt; i++) {
 		struct dc_link *link = NULL;
@@ -4471,8 +4452,8 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
 				amdgpu_dm_update_connector_after_detect(aconnector);
 				setup_backlight_device(dm, aconnector);
 
-				if (psr_feature_enabled)
-					amdgpu_dm_set_psr_caps(link);
+				/* Determine & Set PSR caps*/
+				amdgpu_dm_set_psr_caps(link);
 
 				/* TODO: Fix vblank control helpers to delay PSR entry to allow this when
 				 * PSR is also supported.
-- 
2.17.1