[PATCH] drm/amd/amdgpu: Fix logic bug in fatal error handling

[Limonciello, Mario]

[Public]



> -----Original Message-----
> From: SHANMUGAM, SRINIVASAN
> <SRINIVASAN.SHANMUGAM at amd.com>
> Sent: Thursday, March 23, 2023 07:32
> To: Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander
> <Alexander.Deucher at amd.com>; Limonciello, Mario
> <Mario.Limonciello at amd.com>; Li, Candice <Candice.Li at amd.com>; Zhang,
> Hawking <Hawking.Zhang at amd.com>
> Cc: amd-gfx at lists.freedesktop.org; SHANMUGAM, SRINIVASAN
> <SRINIVASAN.SHANMUGAM at amd.com>
> Subject: [PATCH] drm/amd/amdgpu: Fix logic bug in fatal error handling
> 
> CC      drivers/gpu/drm/amd/amdgpu/amdgpu_ras.o
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2567:28: error: bitwise or with
> non-zero value always evaluates to true [-Werror,-Wtautological-bitwise-
> compare]
>               if (adev->ras_hw_enabled | AMDGPU_RAS_BLOCK__DF)
>                   ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
> 
> Presumably the author intended to test if AMDGPU_RAS_BLOCK__DF
> bit was set if ras is enabled, so that's what I'm changing the
> code to. Hopefully to do the right thing.
> 
> Cc: Christian König <christian.koenig at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: Mario Limonciello <mario.limonciello at amd.com>
> Cc: Hawking Zhang <Hawking.Zhang at amd.com>
> Cc: Candice Li <candice.li at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 5b17790218811..fac45f98145d8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -2564,7 +2564,7 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
>  			adev->nbio.ras = &nbio_v7_4_ras;
>  		break;
>  	case IP_VERSION(4, 3, 0):
> -		if (adev->ras_hw_enabled | AMDGPU_RAS_BLOCK__DF)
> +		if (adev->ras_hw_enabled & AMDGPU_RAS_BLOCK__DF)
>  			/* unlike other generation of nbio ras,
>  			 * nbio v4_3 only support fatal error interrupt
>  			 * to inform software that DF is freezed due to
> --
> 2.25.1

This change generally makes sense for what you showed above, but what tree
is this against?  That doesn't look like amd-staging-drm-next, Linus' tree or even
some recent tags.