[PATCH] drm/amdgpu/nbio4.3: set proper rmmio_remap.reg_offset for SR-IOV

[Tsai, Timmy]

[AMD Official Use Only - General]

Reviewed-by: Timmy Tsai <timmtsai at amd.com>

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Alex Deucher <alexander.deucher at amd.com>
Sent: Thursday, September 7, 2023 3:47 PM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
Subject: [PATCH] drm/amdgpu/nbio4.3: set proper rmmio_remap.reg_offset for SR-IOV

Needed for HDP flush to work correctly.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
index d5ed9e0e1a5f..e5b5b0f4940f 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
@@ -345,6 +345,9 @@ static void nbio_v4_3_init_registers(struct amdgpu_device *adev)
                 data &= ~RCC_DEV0_EPF2_STRAP2__STRAP_NO_SOFT_RESET_DEV0_F2_MASK;
                 WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);
         }
+       if (amdgpu_sriov_vf(adev))
+               adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
+                       regBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
 }

 static u32 nbio_v4_3_get_rom_offset(struct amdgpu_device *adev)
--
2.41.0

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