[PATCH] drm/amdgpu/mes: add mes mapping legacy queue switch

Alex Deucher alexdeucher at gmail.com
Thu Aug 22 13:27:23 UTC 2024


On Thu, Aug 22, 2024 at 6:55 AM Jack Xiao <Jack.Xiao at amd.com> wrote:
>
> For mes11 old firmware has issue to map legacy queue,
> add a flag to switch mes to map legacy queue.
>

Reported-by: Andrew Worsley <amworsley at gmail.com>
Link: https://lists.freedesktop.org/archives/amd-gfx/2024-August/112773.html

> Signed-off-by: Jack Xiao <Jack.Xiao at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c |  4 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/mes_v11_0.c  | 49 +++++++++++++++++--------
>  drivers/gpu/drm/amd/amdgpu/mes_v12_0.c  |  9 +++--
>  4 files changed, 43 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 9be8cafdcecc..3ff39d3ec317 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -657,7 +657,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
>         uint64_t queue_mask = 0;
>         int r, i, j;
>
> -       if (adev->enable_mes)
> +       if (adev->mes.enable_legacy_queue_map)
>                 return amdgpu_gfx_mes_enable_kcq(adev, xcc_id);
>
>         if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources)
> @@ -719,7 +719,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
>
>         amdgpu_device_flush_hdp(adev, NULL);
>
> -       if (adev->enable_mes) {
> +       if (adev->mes.enable_legacy_queue_map) {
>                 for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
>                         j = i + xcc_id * adev->gfx.num_gfx_rings;
>                         r = amdgpu_mes_map_legacy_queue(adev,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> index 548e724e3a75..a509dbed858e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> @@ -75,6 +75,7 @@ struct amdgpu_mes {
>
>         uint32_t                        sched_version;
>         uint32_t                        kiq_version;
> +       bool                            enable_legacy_queue_map;
>
>         uint32_t                        total_max_queue;
>         uint32_t                        max_doorbell_slices;
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> index c0340ee3dec0..dfe51e41504a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> @@ -726,6 +726,28 @@ static void mes_v11_0_free_ucode_buffers(struct amdgpu_device *adev,
>                               (void **)&adev->mes.ucode_fw_ptr[pipe]);
>  }
>
> +static void mes_v11_0_get_fw_version(struct amdgpu_device *adev)
> +{
> +       int pipe;
> +
> +       /* get MES scheduler/KIQ versions */
> +       mutex_lock(&adev->srbm_mutex);
> +
> +       for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
> +               soc21_grbm_select(adev, 3, pipe, 0, 0);
> +
> +               if (pipe == AMDGPU_MES_SCHED_PIPE)
> +                       adev->mes.sched_version =
> +                               RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
> +               else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
> +                       adev->mes.kiq_version =
> +                               RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
> +       }
> +
> +       soc21_grbm_select(adev, 0, 0, 0, 0);
> +       mutex_unlock(&adev->srbm_mutex);
> +}

I think we can also get this from the firmware binary?  Either way the patch is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> +
>  static void mes_v11_0_enable(struct amdgpu_device *adev, bool enable)
>  {
>         uint64_t ucode_addr;
> @@ -1095,18 +1117,6 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev,
>                 mes_v11_0_queue_init_register(ring);
>         }
>
> -       /* get MES scheduler/KIQ versions */
> -       mutex_lock(&adev->srbm_mutex);
> -       soc21_grbm_select(adev, 3, pipe, 0, 0);
> -
> -       if (pipe == AMDGPU_MES_SCHED_PIPE)
> -               adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
> -       else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
> -               adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
> -
> -       soc21_grbm_select(adev, 0, 0, 0, 0);
> -       mutex_unlock(&adev->srbm_mutex);
> -
>         return 0;
>  }
>
> @@ -1353,15 +1363,24 @@ static int mes_v11_0_kiq_hw_init(struct amdgpu_device *adev)
>
>         mes_v11_0_enable(adev, true);
>
> +       mes_v11_0_get_fw_version(adev);
> +
>         mes_v11_0_kiq_setting(&adev->gfx.kiq[0].ring);
>
>         r = mes_v11_0_queue_init(adev, AMDGPU_MES_KIQ_PIPE);
>         if (r)
>                 goto failure;
>
> -       r = mes_v11_0_hw_init(adev);
> -       if (r)
> -               goto failure;
> +       if ((adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x47)
> +               adev->mes.enable_legacy_queue_map = true;
> +       else
> +               adev->mes.enable_legacy_queue_map = false;
> +
> +       if (adev->mes.enable_legacy_queue_map) {
> +               r = mes_v11_0_hw_init(adev);
> +               if (r)
> +                       goto failure;
> +       }
>
>         return r;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> index 0f1702a78170..f0d58295d31d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
> @@ -1300,6 +1300,7 @@ static int mes_v12_0_sw_init(void *handle)
>         adev->mes.funcs = &mes_v12_0_funcs;
>         adev->mes.kiq_hw_init = &mes_v12_0_kiq_hw_init;
>         adev->mes.kiq_hw_fini = &mes_v12_0_kiq_hw_fini;
> +       adev->mes.enable_legacy_queue_map = true;
>
>         adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;
>
> @@ -1456,9 +1457,11 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev)
>                 mes_v12_0_set_hw_resources_1(&adev->mes, AMDGPU_MES_KIQ_PIPE);
>         }
>
> -       r = mes_v12_0_hw_init(adev);
> -       if (r)
> -               goto failure;
> +       if (adev->mes.enable_legacy_queue_map) {
> +               r = mes_v12_0_hw_init(adev);
> +               if (r)
> +                       goto failure;
> +       }
>
>         return r;
>
> --
> 2.41.0
>


More information about the amd-gfx mailing list