[PATCH] drm/amdkfd: hard-code cacheline for gc943,gc944

[Alex Deucher]

On Wed, Nov 27, 2024 at 1:22 PM David Yat Sin <David.YatSin at amd.com> wrote:
>
> Cacheline size is not available in IP discovery for gc943,gc944.
>
> Signed-off-by: David Yat Sin <David.YatSin at amd.com>
> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> index cd7b81b7b939..3a43c816f03d 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> @@ -1503,6 +1503,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
>         if (adev->gfx.config.gc_tcp_size_per_cu) {
>                 pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu;
>                 pcache_info[i].cache_level = 1;
> +               /* Cacheline size not available in IP discovery for gc943,gc944 */
> +               pcache_info[i].cache_line_size = 128;
>                 pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
>                                         CRAT_CACHE_FLAGS_DATA_CACHE |
>                                         CRAT_CACHE_FLAGS_SIMD_CACHE);
> @@ -1514,6 +1516,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
>                 pcache_info[i].cache_size =
>                         adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;
>                 pcache_info[i].cache_level = 1;
> +               pcache_info[i].cache_line_size = 64;
>                 pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
>                                         CRAT_CACHE_FLAGS_INST_CACHE |
>                                         CRAT_CACHE_FLAGS_SIMD_CACHE);
> @@ -1524,6 +1527,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
>         if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {
>                 pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;
>                 pcache_info[i].cache_level = 1;
> +               pcache_info[i].cache_line_size = 64;
>                 pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
>                                         CRAT_CACHE_FLAGS_DATA_CACHE |
>                                         CRAT_CACHE_FLAGS_SIMD_CACHE);
> @@ -1534,6 +1538,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
>         if (adev->gfx.config.gc_tcc_size) {
>                 pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size;
>                 pcache_info[i].cache_level = 2;
> +               pcache_info[i].cache_line_size = 128;
>                 pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
>                                         CRAT_CACHE_FLAGS_DATA_CACHE |
>                                         CRAT_CACHE_FLAGS_SIMD_CACHE);
> @@ -1544,6 +1549,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
>         if (adev->gmc.mall_size) {
>                 pcache_info[i].cache_size = adev->gmc.mall_size / 1024;
>                 pcache_info[i].cache_level = 3;
> +               pcache_info[i].cache_line_size = 64;
>                 pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
>                                         CRAT_CACHE_FLAGS_DATA_CACHE |
>                                         CRAT_CACHE_FLAGS_SIMD_CACHE);
> --
> 2.34.1
>