[PATCH 2/2] drm/amdkfd: hard-code MALL Cacheline size for gfx11, gfx12

[Belanger, David]

Reviewed-by: David Belanger <david.belanger at amd.com>


On 11/28/2024 11:17 AM, Harish Kasiviswanathan wrote:
> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan at amd.com>
> ---
>   drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> index 3ca95f54601e..e0faec4682f3 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> @@ -1504,7 +1504,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config(struct kfd_dev *kdev,
>   					CRAT_CACHE_FLAGS_DATA_CACHE |
>   					CRAT_CACHE_FLAGS_SIMD_CACHE);
>   		pcache_info[i].num_cu_shared = adev->gfx.config.max_cu_per_sh;
> -		pcache_info[i].cache_line_size = 0;
> +		pcache_info[i].cache_line_size = 64;
>   		i++;
>   	}
>   	return i;