[PATCH 3/3] drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules

[Wang, Yang(Kevin)]

[AMD Official Use Only - General]

Series is

Acked-by: Yang Wang<kevinyang.wang at amd.com>

Best Regards,
Kevin
________________________________
From: Ma, Jun <Jun.Ma2 at amd.com>
Sent: Friday, May 10, 2024 17:42
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Feng, Kenneth <Kenneth.Feng at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Ma, Jun <Jun.Ma2 at amd.com>
Subject: [PATCH 3/3] drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules

Check the pointer value to fix potential null pointer
dereference

Signed-off-by: Ma Jun <Jun.Ma2 at amd.com>
---
 .../gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c    |  7 +++++--
 .../gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c    | 14 ++++++++------
 .../gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c  |  7 +++++--
 3 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 9301e65ff13c..632a25957477 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -3314,8 +3314,7 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                         const struct pp_power_state *current_ps)
 {
         struct amdgpu_device *adev = hwmgr->adev;
-       struct smu7_power_state *smu7_ps =
-                               cast_phw_smu7_power_state(&request_ps->hardware);
+       struct smu7_power_state *smu7_ps;
         uint32_t sclk;
         uint32_t mclk;
         struct PP_Clocks minimum_clocks = {0};
@@ -3332,6 +3331,10 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
         uint32_t latency;
         bool latency_allowed = false;

+       smu7_ps = cast_phw_smu7_power_state(&request_ps->hardware);
+       if (!smu7_ps)
+               return -EINVAL;
+
         data->battery_state = (PP_StateUILabel_Battery ==
                         request_ps->classification.ui_label);
         data->mclk_ignore_signal = false;
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
index b858cc2a5c9e..7e1197420873 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
@@ -1074,16 +1074,18 @@ static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                                 struct pp_power_state  *prequest_ps,
                         const struct pp_power_state *pcurrent_ps)
 {
-       struct smu8_power_state *smu8_ps =
-                               cast_smu8_power_state(&prequest_ps->hardware);
-
-       const struct smu8_power_state *smu8_current_ps =
-                               cast_const_smu8_power_state(&pcurrent_ps->hardware);
-
+       struct smu8_power_state *smu8_ps;
+       const struct smu8_power_state *smu8_current_ps;
         struct smu8_hwmgr *data = hwmgr->backend;
         struct PP_Clocks clocks = {0, 0, 0, 0};
         bool force_high;

+       smu8_ps = cast_smu8_power_state(&prequest_ps->hardware);
+       smu8_current_ps = cast_const_smu8_power_state(&pcurrent_ps->hardware);
+
+       if (!smu8_ps || !smu8_current_ps)
+               return -EINVAL;
+
         smu8_ps->need_dfs_bypass = true;

         data->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label);
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 3b461c07344b..6524d99e5cab 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -3280,8 +3280,7 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                         const struct pp_power_state *current_ps)
 {
         struct amdgpu_device *adev = hwmgr->adev;
-       struct vega10_power_state *vega10_ps =
-                               cast_phw_vega10_power_state(&request_ps->hardware);
+       struct vega10_power_state *vega10_ps;
         uint32_t sclk;
         uint32_t mclk;
         struct PP_Clocks minimum_clocks = {0};
@@ -3299,6 +3298,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
         uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0;
         uint32_t latency;

+       vega10_ps = cast_phw_vega10_power_state(&request_ps->hardware);
+       if (!vega10_ps)
+               return -EINVAL;
+
         data->battery_state = (PP_StateUILabel_Battery ==
                         request_ps->classification.ui_label);

--
2.34.1

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