[PATCH 20/32] drm/amd/display: bypass ODM before CRTC off

[Zaeem Mohamed]

From: Yihan Zhu <yihan.zhu at amd.com>

[WHY]
OPPs couldn't disconnect from the ODM that cause the double buffer pending not being latched due to missing VUPDATE.

[HOW]
Moving memory blanking before OTG turn off to make sure double buffer latched correctly.

Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin at amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed at amd.com>
Signed-off-by: Yihan Zhu <yihan.zhu at amd.com>
---
 .../gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c    | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c
index de83761edce8..6bbbf313b2bb 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c
@@ -121,6 +121,17 @@ static bool optc31_enable_crtc(struct timing_generator *optc)
 static bool optc31_disable_crtc(struct timing_generator *optc)
 {
 	struct optc *optc1 = DCN10TG_FROM_TG(optc);
+
+	REG_UPDATE_5(OPTC_DATA_SOURCE_SELECT,
+			OPTC_SEG0_SRC_SEL, 0xf,
+			OPTC_SEG1_SRC_SEL, 0xf,
+			OPTC_SEG2_SRC_SEL, 0xf,
+			OPTC_SEG3_SRC_SEL, 0xf,
+			OPTC_NUM_OF_INPUT_SEGMENT, 0);
+
+	REG_UPDATE(OPTC_MEMORY_CONFIG,
+			OPTC_MEM_SEL, 0);
+
 	/* disable otg request until end of the first line
 	 * in the vertical blank region
 	 */
-- 
2.34.1